IDDA_DACLP —50 10" />
參數(shù)資料
型號： TWR-MCF51MM-KIT
廠商： Freescale Semiconductor
文件頁數(shù)： 21/57頁
文件大?。?/td> 0K
描述： KIT TOWER DEV FOR MCF51AG
設(shè)計(jì)資源： TWR-MCF51MM Schematic
標(biāo)準(zhǔn)包裝： 1
系列： ColdFire®, Flexis™
類型： MCU
適用于相關(guān)產(chǎn)品： Freescale 電源塔系統(tǒng)，MCF51MM
所含物品： 4 個(gè)板，線纜，文檔，DVD，MED-EKG 傳感器
Electrical Characteristics
Freescale Semiconductor
28
2
Supply current low-power mode
IDDA_DACLP
—50
100
A
T
3
Supply current high-power mode
IDDA_DACHP
—
345
500
A
T
4
F
ull-scale Settling time
(±1 LSB)
(0x080 to 0xF7F or 0xF7F to
0x080)
low-power mode
TsFSLP
—
200
s
T
VDDA = 3 V
or 2.2 V
VREFSEL = 1
Temperature
= 25°C
5
F
ull-scale Settling time
(±1 LSB)
(0x080 to 0xF7F or 0xF7F to
0x080)
high-power mode
TsFSHP
—
30
s
T
VDDA = 3 V
or 2.2 V
VREFSEL = 1
Temperature
= 25°C
6
Code-to-code Settling time
(±1 LSB)
(0xBF8 to 0xC08 or 0xC08 to
0xBF8)
low-power mode
TsC-CLP
——
5
s
T
VDDA = 3 V
or 2.2 V
VREFSEL = 1
Temperature
= 25°C
7
Code-to-code Settling time
(±1 LSB)
(0xBF8 to 0xC08 or 0xC08 to
0xBF8)
high-power mode (3 V at Room
Temperature)
TsC-CHP
—1
—
s
T
VDDA = 3 V
or 2.2 V
VREFSEL = 1
Temperature
= 25°C
8
DAC output voltage range low
(high-power mode, no load, DAC
set to 0) (3 V at Room
Temperature)
Vdacoutl
—
100
mV
T
9
DAC output voltage range high
(high-power mode, no load, DAC
set to 0x0FFF)
Vdacouth
VDACR
-100
—
—mV
T
10
Integral non-linearity error
INL
—
± 8
LSB
T
11
Differential non-linearity error
VDACR is > 2.4 V
DNL
—
± 1
LSB
T
12
Offset error
EO
—
±0.4
± 3
%FSR
T
Calculated
by a best fit
curve from
VSS +
100mV to
VREFH
–100mV
13
Gain error,
VREFH = Vext = VDD
EG
—
±0.1
± 0.5
%FSR
T
Calculated
by a best fit
curve from
VSS +
100mV to
VREFH
–100mV
Table 14. DAC 12-Bit Operating Behaviors (continued)
#
Characteristic
Symbol
Min
Typ
Max
Unit
C
Notes
MCF51MM256/128, Rev. 5
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