參數(shù)資料
型號(hào)： TTRN012G5
英文描述： TTRN012G5 (2.5 Gbits/s) and TTRN012G7 (2.5 Gbits/s and 2.7 Gbits/s) Clock Synthesizer, 16:1 Data Multiplexer
中文描述： TTRN012G5（2.5 Gb /秒）和TTRN012G7（2.5 Gb /秒和2.7 Gb /秒）時(shí)鐘合成器，16:1數(shù)據(jù)復(fù)用器
文件頁(yè)數(shù)： 14/22頁(yè)
文件大小： 394K
代理商： TTRN012G5
TTRN012G5 and TTRN012G7
Clock Synthesizer, 16:1 Data Multiplexer
Preliminary Data Sheet
August 2000
14
Lucent Technologies Inc.
CML Output Structure (Used on Pins D2G5P/N, CK2G5P/N)
The CML architecture is essentially a current-steering mechanism combined with an amplifier. This makes the out-
put swing of the signal a function of the termination resistor and the programmable output current. The user should
connect external termination resistors from the CML output pins to V
CC
. The on-chip, 100
pull-up resistors pro-
vide a dc path when using an ac-coupled load.
The voltage swing of a CML signal is typically 400 mV, half that of ECL/PECL. The lower pulse amplitude reduces
noise transients, crosstalk, and EMI. It also uses half the amount of current through the termination resistors. The
schematic of a typical CML output structure is shown in Figure 7.
5-8065(F)r.2
Figure 7. Typical CML Output Structure
Choosing the Value of the External CML Reference Resistors (RREF1, RREF2)
The flexibility of the CML interface permits certain parameters to be customized for a particular application. The
RREF1
resistor controls the CML output driver current source. Adjusting this tail current and termination resistors
will allow signal amplitude control (see the CML output specifications for limitations, page 18 and page 20) and
flexibility in termination schemes.
With RREF2 set to 1.5 k
, the equation for the CML output current is the following:
Iout = (18)*(1.21)/RREF1
The CML outputs have on-chip 100
load resistors to V
CC
to accommodate capacitive ac coupling. With a 50
1% load, the effective load resistance will be 33.33
± 6%. For a 400 mV voltage swing into the 50
load, set
RREF1 to 1.8 k
. For a 600 mV voltage swing, set RREF1 to 1.2 k
. In both cases, RREF2 remains fixed at a
value of 1.5 k
.
DEVICE-INTERNAL CML OUTPUT BUFFER CIRCUIT
EXTERNAL OUTPUT TERMINATION
V
CC
V
CC
50
50
V
CC
V
CC
100
100
VREF
18X
V
CC
RREF1
RREF2
+
–
I
OUT
I
OUT
相關(guān)PDF資料
PDF描述
TTRN012G7 TTRN012G5 (2.5 Gbits/s) and TTRN012G7 (2.5 Gbits/s and 2.7 Gbits/s) Clock Synthesizer, 16:1 Data Multiplexer
TTRN012G5 Clock Synthesizer, 16:1 Data Multiplexer(2.5 Gbits/s)(時(shí)鐘合成器，16：1數(shù)據(jù)多路復(fù)用器(2.5 G位/秒))
TTRN012G7 Clock Synthesizer, 16:1 Data Multiplexer(2.5 Gbits/s and 2.7 Gbits/s)(時(shí)鐘合成器，16：1數(shù)據(jù)多路復(fù)用器(2.5 G位/秒和2.7 G位/秒）)
TTS3816B4E 2M x 16Bit x 4 Banks synchronous DRAM
TTS3816B4E-6 2M x 16Bit x 4 Banks synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TTRN012G53XE1 制造商:AGERE 制造商全稱(chēng):AGERE 功能描述:TTRN012G5 (2.5 Gbits/s) and TTRN012G7 (2.5 Gbits/s and 2.7 Gbits/s) Clock Synthesizer, 16:1 Data Multiplexer
TTRN012G7 制造商:AGERE 制造商全稱(chēng):AGERE 功能描述:TTRN012G5 (2.5 Gbits/s) and TTRN012G7 (2.5 Gbits/s and 2.7 Gbits/s) Clock Synthesizer, 16:1 Data Multiplexer
TTRN012G73XE1 制造商:AGERE 制造商全稱(chēng):AGERE 功能描述:TTRN012G5 (2.5 Gbits/s) and TTRN012G7 (2.5 Gbits/s and 2.7 Gbits/s) Clock Synthesizer, 16:1 Data Multiplexer
TTR-RED 功能描述:打印機(jī) Ribbon, Resin, 4.33" W x 299’ L, for use RoHS:否 制造商:Seiko Instruments 產(chǎn)品:Printer 電源電壓: 每行點(diǎn)數(shù):9 x 320 打印速度:52.5 cps, 80 cps 紙張寬度:112 mm
TTRW2-BL 功能描述:打印機(jī) Ribbon, Wax, 2.50" W x 280’ L, for use w RoHS:否 制造商:Seiko Instruments 產(chǎn)品:Printer 電源電壓: 每行點(diǎn)數(shù):9 x 320 打印速度:52.5 cps, 80 cps 紙張寬度:112 mm
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