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參數(shù)資料
| 型號： | TSS461CR |
| 英文描述： | LAN Node Controller |
| 中文描述： | 網(wǎng)絡(luò)節(jié)點控制器 |
| 文件頁數(shù)： | 33/52頁 |
| 文件大小： | 268K |
| 代理商： | TSS461CR |
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TSS461C
33
Rev. D (22 Feb 01)
9.3.2. Message Pointer Register:
The message pointer register at address (base_address + 0x02) is 8 bits wide. It indicates where in the Message DATA
RAM area the message buffer is located.
7
6
5
4
3
2
1
0
DRAK
M_P 6
M_P 5
M_P 4
M_P 3
M_P 2
M_P 1
M_P 0
base_address
+ 0x02
Read / Write register.
DRAK:
Disable RAK (used in
’
spy mode
’
)
In reception: whatever is the RAK bit of the incoming valid frame, no
ACK answer will be set. If the message was successfully received, an IT
is set (ROK or RNOK).
In transmission: no action.
One: disable active,
’
spy
’
mode.
Zero: disable inactive, normal operation.
M_P [6:0]:
Message pointer
Since the Message DATA RAM area base address is 0x80, the value in
this register is the offset from that address. If the message buffer length
value is illegal (i.e. zero), this register is redefined as being a link pointer,
thus containing the channel number of the channel that contains the
actual message pointer, message length and received status. However,
the identifier, mask, error and transmitted status used will be that of the
originally matched channel. In any case, if a link is intended, the three
high bits of M_P [6:0] should be set to 0.
This allows several channels to use the same actual reception buffer in
Message DATA RAM, thus diminishing the memory usage.
Note that only 1 level of link is supported.
9.3.3. Message Length And Status Register:
The message length and status register at address (base_address + 0x03) is also 8 bits wide. It indicates the length of
reseved for the message in the Message DATA RAM area.
7
6
5
4
3
2
1
0
M_L 4
M_L 3
M_L 2
M_L 1
M_L 0
CHER
CHTx
CHRx
base_address
+ 0x03
Read / Write register.
M_L [4:0]:
Message Length
The 5 high bits of this register allows the user to specify either the length
of the message to be transmitted, or the maximum length of a message
receivable in the pointed reception buffer.
Note, that the first byte in this register does not contain data, but the
length of the message received. This implies that the length value has
to be equal to or greater than the maximum length of a message to be
received in this buffer (or the length of a message to be transmitted) plus
1, thus allowing a maximum length of 30 bytes and a minimum length
of 0 byte.
If the value of this field is
“
illegal
”
(i.e 0x00) then this message pointer
is defined as being a link
(see Message pointer & register and section 15.).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TSS463-AA | TSS463-AA [Updated 3/03. 60 Pages] |
| TSS463D | Industrial Control IC |
| TSS463R | Industrial Control IC |
| TSS461E | VAN Data Link Controller |
| TSS461E-TDRA-9 | VAN Data Link Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSS461C-TDRZ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC ASICS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| TSS461CVAN | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:Van Controller Serial Interface |
| TSS461E | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:VAN Data Link Controller |
| TSS461E_06 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:VAN Data Link Controller |
| TSS461E-TDRA-9 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:VAN Data Link Controller |
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