參數(shù)資料
型號(hào): TSC2300IPAGRG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: GREEN, PLASTIC, TQFP-64
文件頁數(shù): 74/83頁
文件大?。?/td> 1268K
代理商: TSC2300IPAGRG4
www.ti.com
TSC2300
SLAS372 — NOVEMBER 2002
DAC Bass-Boost Coefficient Registers (continued)
ADDRESS
DAC CHANNEL
COEFFICIENT
DEFAULT
07h
Left
N0
6BE2
08h
Left
N1
9667
09h
Left
N2
675D
0Ah
Left
N3
6BE2
0Bh
Left
N4
9667
0Ch
Left
N5
675D
0Dh
Left
D1
7D82
0Eh
Left
D2
84EF
0Fh
Left
D4
7D82
10h
Left
D5
84EF
11h
Right
N0
6BE2
12h
Right
N1
9667
13h
Right
N2
675D
14h
Right
N3
6BE2
15h
Right
N4
9667
16h
Right
N5
675D
17h
Right
D1
7D82
18h
Right
D2
84EF
19h
Right
D4
7D82
1Ah
Right
D5
84EF
LAYOUT
The following layout suggestions should provide optimum performance from the TSC2300. However, many portable
applications have conflicting requirements concerning power, cost, size, and weight. In general, most portable devices
have fairly clean power and grounds because most of the internal components are very low power. This situation would
mean less bypassing for the converter’s power and less concern regarding grounding. Still, each situation is unique
and the following suggestions should be reviewed carefully.
For optimum performance, care should be taken with the physical layout of the TSC2300 circuitry. The basic SAR
architecture is sensitive to glitches or sudden changes on the power supply, reference, ground connections, and digital
inputs that occur just prior to latching the output of the analog comparator. Therefore, during any single conversion for
an n-bit SAR converter, there are n windows in which large external transient voltages can easily affect the conversion
result. Such glitches might originate from switching power supplies, nearby digital logic, and high power devices. The
degree of error in the digital output depends on the reference voltage, layout, and the exact timing of the external
event. The error can change if the external event changes in time with respect to the internal conversion clock. The
touch screen circuitry, as well as the audio headphone amplifiers, uses the HPVDD/HPGND supplies for its power, and
any noise on this supply may adversely affect performance in these blocks.
As described earlier, the audio common-mode voltage VCM is derived directly through an internal resistor divider
between AVDD and AGND. Therefore, noise that couples onto AVDD/AGND will be translated onto VCM and can
adversely impact audio performance. The reference pins for the audio data converters, VREF+/VREF-, should also be
kept as clean and noise-free as possible, since noise here will affect audio DAC/ADC quality. De-coupling capacitors
are recommended between VREF+ and VREF-, in addition to a series resistance between VREF+ and the source of
the voltage (such as connecting to the source providing AVDD).
With this in mind, power to the TSC2300 should be clean and well bypassed. A 0.1-F ceramic bypass capacitor
should be placed as close to the device as possible on each supply pin to its respective ground pin. A 1-F to 10-F
capacitor may also be needed if the impedance of the connection between a supply and the power supply is high.
A bypass capacitor on the SAR Vref pin may not be absolutely necessary because this reference is buffered by an
internal op amp, but a 0.1uF bypass capacitor may reduce noise on this reference. If an external reference voltage
originates from an op amp, make sure that it can drive any bypass capacitor that is used without oscillation.
76
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