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DETAILED DESCRIPTION
Supply Voltages
Gate Driver
Control Circuit
Protection
SLVS524A – OCTOBER 2005 – REVISED FEBRUARY 2006
The TPS68000 and the connected H-bridge power stage can be completely supplied by a voltage connected to
VCC. This voltage must be between 8 V to 30 V. In this configuration an internal linear regulator generates the 5
V required for control supply and gate drive supply. It is available at the V5 pin. The external capacitors for
supplying the high side gate drivers during operation are charged using internal diodes during the time when the
low side switches are turned on. The 3.3-V reference voltage is generated with a precise linear regulator, which
is also supplied from the 5-V control supply.
Optionally, the device can be supplied using a regulated 5-V rail. This is done by connecting the external 5 V to
VCC and V5. This way the internal regulator is bypassed and the internal power dissipation is reduced. It also
makes it possible to use any voltage lower than 30 V to supply the H-bridge power stage. When using
appropriate means of isolating the gate drive outputs of the device from their respective gates of the H-bridge
switches, the device can control power stages with higher input voltages as well. An example for this
configuration is using the output voltage of the PFC directly as a supply for the H-bridge power stage.
The TPS68000 is a controller for converters, built with a full bridge topology. To control the output power
high-side and low-side switches in each of the two half bridges are driven alternately with 50% duty cycle. By
phase shifting both half-bridge parts to each other, output power is controlled. Current can only flow into the
transformer if one of the high side switches is turned on the same time as the low-side switch on the other
half-bridge is turned on. Maximum output power can be achieved if the turn on time of the high-side switch on
one half-bridge exactly overlaps with the turn on time of the low side on the other half bridge. Zero output power
will be if there is no overlap.
To properly control the 4 switches required for this phase shift full bridge topology, 4 gate drivers are
implemented. To obtain maximum efficiency at lowest costs the gate drivers are designed to drive 4 N-Channel
MOSFETs. The gate drive outputs can be connected directly to the gates of the FETs. There is no gate drive
circuit required as long as the operating input voltage range does not exceed the isolation voltage of the high
side drivers or the drive capability is not sufficient for larger FETs. The nominal gate drive voltage is 5 V. This
5-V rail is generated internally in the device and is used directly to supply the low side drivers. For the high side
drivers external capacitors are used to supply the drivers. They are charged up during the on time of the low-side
drivers.
The device is able to control lamp current and lamp voltage directly. Lamp voltage and lamp current are sensed
with an appropriate feedback divider and a shunt resistor. By suitable designing feedback divider and shunt
resistor lamp current and maximum lamp voltage are programmed. Since the lamp needs to be operated with AC
current, the feedback signals in simple applications usually are AC voltages. To directly support this and to save
external components for rectification, internal half wave rectifiers are built in the device.
Regulating current and voltage is done by two independent error amplifiers. Both are compensated externally to
be flexible to meet the demands for a wide variety of CCFL backlight applications. Both error amplifier outputs
feed the phase shift modulator. Whichever error amplifier requires the lower duty cycle, takes over control of the
system. The control circuit also detects whether the device operates in voltage regulation or in current regulation.
If voltage regulation is detected a fault condition is assumed, for example a broken lamp. In this condition the
control circuit waits for a programmed wait time. If the current regulator does not take over control again during
this wait time, the device shuts down and sets the FAULT flag. The wait time is programmed with the size of the
capacitance at STC.
In addition to the voltage regulator other means of protection are implemented. To ensure that the secondary
voltage of the transformer does not exceed the isolation breakdown voltage of the transformer an overvoltage
comparator is implemented. This comparator monitors the rectified voltage at the VSEN input. If the peak voltage
level at VSEN rises 20% above the nominal regulation voltage, regulated by the voltage amplifier, the
overvoltage comparator trips and the device immediately enters FAULT condition. For detailed threshold values
please check the electrical characteristics table.
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