參數(shù)資料
型號(hào): TPS65820RSHT
廠商: TEXAS INSTRUMENTS INC
元件分類: 電源管理
英文描述: 8-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC56
封裝: 7 X 7 MM, GREEN, PLASTIC, QFN-56
文件頁數(shù): 70/98頁
文件大小: 2290K
代理商: TPS65820RSHT
ADC Input Signal Range Setting
SLVS663B – MAY 2006 – REVISED APRIL 2008 .............................................................................................................................................................. www.ti.com
5. Monitor the INT pin. An interrupt triggered by ADC_STATUS=LO indicates that the selected input signal is
out of range
To exit the continuous mode the host must follow the steps below, if external trigger mode was set :
1. Exit external trigger mode
2. Set REPEAT bit to LO, effectively terminating the repeat mode. This generates an additional conversion; at
the end of this conversion the ADC is ready for a new configuration.
3. Set ADC_EN to LO, after on-going conversion ends
To exit the continuous mode the host must follow the steps below, if internal trigger mode was set :
1. Set REPEAT bit to LO, effectively terminating the repeat mode.
2. Set ADC_EN to LO, after on-going conversion ends
The registers DHILIMn and DLOLIMn can be used by the host to set maximum and minimum limits for the DAC
engine output. At the end of each conversion the ADC output is checked for the maximum and minimum limits,
and a status flag is set if the converted data exceeds the high limit or is under the low limit. In multiple sample
operation the converted data range is checked when all programmed samples have been converted.
The host can mask or unmask interrupts caused by the ADC range status bits using the INT_MASKn registers.
72
Copyright 2006–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS65820
相關(guān)PDF資料
PDF描述
TPS65820RSH 8-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC56
TRU050-GACHA-47M4570000 PHASE LOCKED LOOP, CDSO16
TRU050-GACNA-12M6240000 PHASE LOCKED LOOP, CDSO16
TRU050-GALNA-20M0000000 PHASE LOCKED LOOP, CDSO16
TRU050-GALNB-51M8400000 PHASE LOCKED LOOP, CDSO16
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