參數(shù)資料
型號(hào)： TPS65013RGZ
廠商： Texas Instruments, Inc.
英文描述： POWER AND BATTERY MANAGEMENT IC FOR Li-ION POWERED SYSTEMS
中文描述： 電源和電池管理集成電路鋰離子供電系統(tǒng)
文件頁(yè)數(shù)： 38/52頁(yè)
文件大?。?/td> 844K
代理商： TPS65013RGZ
www.ti.com
TPS65013
SLVS517–AUGUST 2004
Interrupt events are always captured; thus when an interrupt source is unmasked, INT may immediately go active
due to a previous interrupt condition. This can be prevented by first reading the relevant STATUS register before
unmasking the interrupt source.
If an interrupt condition occurs, then the INT pin is set low. The CHGSTATUS, REGSTATUS, and DEFGPIO
registers should be read. Bit positions containing a 1 (or possibly a 0 in DEFGPIO) are noted by the CPU and the
corresponding situation resolved. The reading of the CHGSTATUS and REGSTATUS registers automatically
acknowledges any interrupt condition in those registers and blocks the path to the INT pin from the relevant
bit(s). No interrupt should be missed during the read process because this process starts by latching the contents
of the register before shifting them out at SDAT. Once the contents have been latched (takes a couple of
nanoseconds), the register is free to capture new interrupt conditions. Hence, the probability of missing anything
is, for practical purposes, zero.
The following describes how registers 0x01 (CHGSTATUS) and 0x02 (REGSTATUS) are handled:
CHGSTATUS(5,0) are positive edge set. Read of set CHGSTATUS(5,0) bits sets ACKINT1(5,0) bits.
CHGSTATUS(7-6,4-1) are level set. Read of set CHGSTATUS(7-6,4-1) bits sets ACKINT1(7-6,4-1) bits.
CHGSTATUS(5,0) clear when input signal low, and ACKINT1(5,0) bits are already set.
CHGSTATUS(7-6,4-1) clear when input signal is low.
ACKINT1(7-0) clear when CHGSTATUS(7-0) is clear.
REGSTATUS(7-5) are positive edge set. Read of set REGSTATUS(7-5) bits sets ACKINT2(7-5) bits.
REGSTATUS(3-0) are level set. Read of set REGSTATUS(3-0) bits sets ACKINT2(3-0) bits.
REGSTATUS(7-5) clear when input signal low, and ACKINT1(7-5) bit are already set.
REGSTATUS(3-0) clear when input signal is low.
ACKINT2(7-0) clear when REGSTATUS(7-0) is clear.
The following describes the function of the 0x05 (ACKINT1) and 0x06 (ACKINT2) registers. These are not
usually written to by the CPU because the TPS65013 internally sets/clears these registers:
ACKINT1(7:0) - Bit is set when the corresponding CHGSTATUS set bit is read via I
2
C.
ACKINT1(7:0) - Bit is cleared when the corresponding CHGSTATUS set bit clears.
ACKINT2(7:0) - Bit is set when the corresponding REGSTATUS set bit is read via I
2
C.
ACKINT2(7:0) - Bit is cleared when the corresponding REGSTATUS set bit clears.
ACKINT1(7:0) - a bit set masks the corresponding CHGSTATUS bit from INT.
ACKINT2(7:0) - a bit set masks the corresponding REGSTATUS bit from INT.
The following describes the function of the 0x03 (MASK1), 0x04 (MASK2) and 0x0F (MASK3) registers:
MASK1(7:0) - a bit set in this register masks CHGSTATUS from INT.
MASK2(7:0) - a bit set in this register masks REGSTATUS from INT.
MASK3(7:4) - a bit set in this register detects a rising edge on GPIO.
MASK3(7:4) - a bit cleared in this register detects a falling edge on GPIO.
MASK3(3:0) - a bit set in this register clears GPIO Detect signal from INT.
GPIO interrupts are located by reading the 0x10 (DEFGPIO) register. The application CPU stores, or can read
from DEFGPIO<7:4>, which GPIO is set to input or output. This information together with the information on
which edge the interrupt was generated (the CPU either knows this or can read it from MASK3<7:4>) determines
whether the CPU is looking for a 0 or a 1 in DEFGPIO<3:0>. A GPIO interrupt is blocked from the INT pin by
setting the relevant MASK3<3:0> bit; this must be done by the CPU, there is no auto-acknowledge for the GPIO
interrupts.
To flag the removal of the charger to the applications processor, a feature is implemented into the TPS65013. As
soon as both of the input voltages at AC and USB are removed, the TPS65013 sets the internal bit NO_CH in
REGSTATUS<4>=1. If the charger is removed from its supply voltage, this bit can be used to generate an
interrupt by setting the mask bit in MASK2<4>=0.
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TPS65013RGZR 功能描述:電池管理 Multi-Channel 1-cell Li-Ion RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel
TPS65013RGZRG4 功能描述:電池管理 Multi-Channel 1-cell Li-Ion RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel
TPS65013RGZT 功能描述:電池管理 Multi-Channel 1-cell Li-Ion RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel
TPS65013RGZT 制造商:Texas Instruments 功能描述:IC POWER/BATTERY MGMT 48-QFN 制造商:Texas Instruments 功能描述:IC, POWER/BATTERY MGMT 48-QFN 制造商:Texas Instruments 功能描述:IC, POWER/BATTERY MGMT 48-QFN; Battery Type:Li-Ion, Li-Polymer; No. of Pins:48; No. of Series Cells:1; Operating Temperature Min:-40C; Operating Temperature Max:85C; MSL:MSL 2 - 1 year; SVHC:No SVHC (19-Dec-2012); Base ;RoHS Compliant: Yes
TPS65013RGZTG4 功能描述:電池管理 Multi-Channel 1-cell Li-Ion RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel
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