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參數(shù)資料
| 型號： | TPS40050PWPRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 0.2 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | GREEN, PLASTIC, HTSSOP-16 |
| 文件頁數(shù)： | 35/36頁 |
| 文件大?。?/td> | 648K |
| 代理商： | TPS40050PWPRG4 |
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TPS40050
TPS40051
TPS40053
SLUS540F DECEMBER 2002 REVISED JUNE 2004
www.ti.com
8
APPLICATION INFORMATION
PROGRAMMING THE RAMP GENERATOR CIRCUIT
The ramp generator circuit provides the actual ramp used by the PWM comparator. The ramp generator
provides voltage feed-forward control by varying the PWM ramp slope with line voltage, while maintaining a
constant ramp magnitude. Varying the PWM ramp directly with line voltage provides excellent response to line
variations since the PWM does not have to wait for loop delays before changing the duty cycle. (See Figure 1).
RAMP
COMP
SW
VIN
UDG02131
VIN
SW
COMP
RAMP
VPEAK
VVALLEY
T2
tON1 >tON2 and d1 >d2
tON2
tON1
d
+
t
ON
T
T1
Figure 1. Voltage Feed-Forward Effect on PWM Duty Cycle
The PWM ramp must be faster than the master clock frequency or the PWM is prevented from starting. The
PWM ramp time is programmed via a single resistor (RKFF) pulled up to VIN. RKFF is related to RT, and the
minimum input voltage, VIN(min) through the following:
R
KFF + VIN (min) * 3.5
58.14
R
T ) 1340 W
where:
D VIN(min) is the ensured minimum start-up voltage. The actual start-up voltage is nominally about 10% lower
at 25
°C.
D RT is the timing resistance in k
The curve showing the RKFF required for a given switching frequency, fSW, is shown in Figure 3.
For low input voltage and high duty cycle applications, the voltage feed-forward may limit the duty cycle
prematurely. This does not occur for most applications. The voltage control loop controls the duty cycle and
regulates the output voltage. For more information on large duty cycle operation, refer to Application Note
(SLUA310).
(2)
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