TPS2346
SLUS529 MAY 2002
7
www.ti.com
pin descriptions (continued)
VIN4: Channel 4 supply (5.2-V) input voltage sense. This pin is connected to the 5.2-V power supply input
to the add-in card. The supply potential is tested against the undervoltage limits prior to ramping voltage to the
back-end 5.2-V plane. The input supply also serves as the reference potential for the internally generated
current limit (IMAX) reference of the Channel 4 LCA.
VS1, VS2, VS3: Voltage sense inputs for the positive back-end power busses. These pins connect to the source
nodes (load side) of the external pass FETs. After the programmed voltage ramp period for each supply, these
inputs are monitored to verify that the load voltages remain within the specified tolerances.
VS4: Voltage sense input for the negative back-end power bus. This pin connects to the drain (load side) of
the Channel 4 external pass FET. After the programmed voltage ramp period for the negative supply, this input
is monitored to verify that the load voltage remains within the specified tolerance.
functional overview
When an add-in printed circuit board (PCB) is inserted into a live chassis slot, the discharged supply bulk
capacitance on the board can draw huge transient currents from the system supplies. Limited only by the ESR
of the bulk capacitors and the impedance of the interconnect, these transients can reach sufficient magnitude
to cause immediate damage to connector pins, PCB etch and plug-in and supply components, or cause latent
defects reducing long-term reliability. In addition, current spikes can cause glitches on the power busses,
causing other boards in the system to reset.
The TPS2346 is designed to actively limit inrush current slew rate and magnitude during insertion and extraction
processes, in order to manage the safe, reliable hot swap of four supply voltages. N-channel MOSFETs in series
with each supply provide isolation between the system supply planes (the backplane) and the back-end power
planes during hot swap events. Back-end power refers to the switched side of a boards power bus. With the
exception of the interface circuitry itself, all the boards load (logic, processors, modules, etc) derives power
from the back-end planes. Consequently, the majority of the bulk capacitance is also on these planes. The in-line
FETs on each supply function as switches for the back-end power, and transition to a low-impedance supply
path once a board is fully seated and enabled, until such time as it is extracted. Low ohmic-value sense resistors
between each input and pass MOSFET feed back current information to the device. The TPS2346 uses load
current sensing along with the peripheral slot enable command, ENABLE
, to determine the appropriate gate
drive status for each of the four MOSFETs. In this manner, the device provides for the controlled application of
power to and removal from the back-end planes.
The TPS2346 derives its VCC power from the 5.15V supply; however, the absence of any one of the supplies,
including the VCC supply, causes the device to maintain pull-downs on the four gate pins, keeping the pass
MOSFETs off. A pull-up on the ENABLE
pin, which should be provided on-board, also keeps the gate outputs
off even after all supply voltages are present. Once the plug-in is powered, a system-generated logic low signal
on the ENABLE
input starts the turn-on of power to the back-end loads.
During a ramp-up sequence, the four supply inputs are validated against the pre-programmed undervoltage
(UV) and overvoltage (OV) thresholds. As each positive voltage load is enabled, current to the load is ramped
at a user-programmable rate, easily set by a capacitor on the current ramp control pin, IRAMP. The supplies
are sequenced up in the following order: 5.15-V, 5-V, 3.3-V and 5.2-V. The ramp of supply current on each
channel is limited to a maximum value, herein referred to as IMAX. The IMAX limit is individually selectable for
each channel, by selecting the appropriate value of the sense resistor. If the IMAX current level is attained on
any channel during an insertion, charging of that channels input bulk capacitance completes at that current limit,
as required.