參數(shù)資料
型號(hào)： TPS2346PWRG4
廠商： Texas Instruments
文件頁(yè)數(shù)： 26/30頁(yè)
文件大小： 490K
描述： IC HOT SWAP POWER MGR 24-TSSOP
標(biāo)準(zhǔn)包裝： 2,000
類型： 熱交換控制器
應(yīng)用： 光纖學(xué)網(wǎng)絡(luò)（ONET）
內(nèi)部開(kāi)關(guān)： 無(wú)
電源電壓： -5.2V，3.3V，5V，5.15V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 24-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 24-TSSOP
包裝： 帶卷 (TR)
TPS2346
 
SLUS529  MAY 2002
26
www.ti.com
APPLICATION INFORMATION
precharge circuit
The precharge pin generates a 1-V bias voltage intended to be used for precharging the bus signals during hot
swap. The pins output stage has both source and sink capability, enabling it to pull lines up from 0 V or down
from the I/O supply potential as needed. In typical implementations, each I/O line requiring precharge is isolated
from the PRECHG source with a biasing resistor, R
P
 in the typical application diagram. Common values for R
P
range from 10 k& to 50 k&. However, a number of factors influence precharge resistor value, including the
number of lines requiring precharge, the parasitic capacitance associated with each line (both stub and I/O
device), the precharge rate needed, and the system requirements for high- and low-level input current (I
IH
, I
IL
)
on each I/O line. Several manufacturers offer integrated bus switches useful for precharge disconnect wherever
input current is an issue.
A stub resistor (R8) is also shown, which is inserted in each I/O line to provide some series damping. Typical
stub resistor value is 10 &, and it should be placed close to the connector.
protecting ICs from voltage transients
Parasitic inductance associated with the power distribution network can cause large voltage spikes on the
supply rails if the current is suddenly interrupted by the TPS2346 during a fault condition. Since the absolute
maximum voltage rating of the device is 15 V, there should be sufficient margin from the supply nominal values
to prevent damage. However, it may be necessary in certain applications to protect either the TPS2346 or other
low-voltage devices connected directly to the plug-ins input rails. There are several techniques that may be
used to improve the transient performance of the plug-in and host system.
D  As a general rule, always use dedicated PCB planes for the power supply and ground nodes, and maximize
the trace width of high-current runs. This minimizes the parasitic inductance of the power distribution
network. This is recommended on both the backplane and plug-in modules.
D   Add small-value capacitors to the supply pins of devices needing protection from transients, connected to
ground. To reduce inrush, these capacitors should be 0.1 礔 or less. For this function, higher ESR capacitors
are actually preferable to low-ESR capacitors, as they provide some RC damping against high-frequency
ringing of the supply voltage. As these capacitors generally reside on the input (non-isolated) side of a
plug-in module, ESR also limits inrush current generated by the added capacitance.
D   In some cases, it may be necessary to add a resistor in series with the input capacitor to improve the
damping response of the circuit. Generally, this is a low-value resistor of about 10 & or less.
D   Clamp the voltage at sensitive IC supply pins with a Zener diode. The maximum breakdown of these
protection devices must be less than the absolute maximum rating of the device being protected. If possible,
select a clamp which is inactive during normal steady-state operation of the module to minimize or eliminate
power dissipation in the protection circuitry. For example, if the VIN1 or VIN2 pins of the TPS2346 require
protection, a 6.8 V, 6% Zener (e.g., BZX84C series) clamps spikes well below the 15-V threshold, but is off
when the supplies are at nominal levels. In addition, even with worst-case tolerances and accounting for
some temperature coefficient, this device should not inhibit the OV detection function of the TPS2346 on
these rails.
D   Place any protection devices, capacitors or diodes, close to the device being protected, with short trace
lengths back to the V
CC
/V
DD
 and GND pins.
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