參數(shù)資料
型號： TNETA1555
廠商： Texas Instruments, Inc.
英文描述： 155.52-Mbit/S Clock-Recovery Device(155.52-MBIT/S時鐘恢復裝置)
中文描述： 155.52 - Mbit / s的時鐘恢復裝置（155.52 - Mbit / s的時鐘恢復裝置）
文件頁數(shù)： 3/10頁
文件大小： 230K
代理商： TNETA1555
TNETA1555
155.52-MBIT/S CLOCK-RECOVERY DEVICE
SDNS001B – SEPTEMBER 1992 – REVISED DECEMBER 1994
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOH
High-level
High level
output voltage
DOUT, DOUT,
CLK, CLK
VCC = 4.75 V to 5.25 V,
See Notes 2 and 3
VCC–1.03
VCC–0.85
V
DATAOUT,
DATAOUT
VCC = 4.75 V,
See Notes 2 and 4
–1.02
–0.75
VOL
Low-level
Low level
output voltage
DOUT, DOUT,
CLK, CLK
VCC = 4.75 V to 5.25 V,
See Notes 2 and 3
VCC–1.85
VCC–1.62
V
DATAOUT,
DATAOUT
VCC = 4.75 V,
See Notes 2 and 4
–1.81
–1.58
VIK
Input clamp
voltage
INDIS
VCC = 4.75 V,
II = –18 mA
–1.2
V
II
Input current
INDIS
VCC = 5.25 V,
VI = VCC or GND
±
1
μ
A
IIH
High-level
input current
DIN, DIN,
DATAIN, DATAIN
VCC = 5.25 V,
VI = 4.45 V
50
μ
A
IIL
Low-level
input current
DIN, DIN,
DATAIN, DATAIN
VCC = 5.25 V,
VI = 3.35 V
50
μ
A
ICC
Supply current
VCC = 5.25 V,
Outputs open
fi = 155.52 Mbit/s,
71
100
mA
VCC = 5.25 V,
See Note 5
fi = 155.52 Mbit/s,
112
150
mA
NOTES:
2. The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for
logic-level voltages only.
3. These outputs are terminated through a 50-
resistor to VCC –2 V.
4. These outputs are terminated through a 50-
resistor to –2 V.
5. DOUT, DOUT, CLK, and CLK are each terminated with a 50-
resistor to VCC –2 V. DATAOUT and DATAOUT are each terminated
with a 50-
resistor to –2 V.
operating characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
PARAMETER
TEST CONDITIONS
CPLL = 330 pF
MIN
TYP
MAX
UNIT
Acquisition time
See Note 6
1
ms
CPLL = 0.1
μ
F
3
Deviation of clock sampling point, tcsp
RMS jitter, recovered clock
See Figure 1
–800
800
4
°
ps
See Note 7
1.5
°
°
RMS
Mb/s
Input data rate
155.52
Duty cycle, recovered clock
See Note 3
45%
55%
Maximum number of consecutive bits (1 or 0) in input data stream
3. These outputs are terminated through a 50-
resistor to VCC –2 V.
6. Acquisition time is the time required to achieve a valid clock output while applying a 27 –1 pseudo-random bit sequence.
7. RMS jitter is measured with a 231 –1 pseudo-random bit sequence.
8. This measurement is made with a 213 –1 pseudo-random bit sequence with string substitution.
See Note 8
100
450
NOTES:
switching characteristics over recommended operating free-air temperature range,
V
CC
= 5 V
±
0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
MAX
UNIT
tPLH
tPHL
DATAIN or DATAIN
DATAOUT or DATAOUT
1.5
4.5
ns
DATAIN or DATAIN
DATAOUT or DATAOUT
1.5
4.5
ns
相關(guān)PDF資料
PDF描述
TNETA1556 155.52-Mbit/S Clock-Recovery Device(155.52-MBIT/S時鐘恢復裝置)
TNETA1560 ATM Segmentation and Reassembly Device with SBUS Host Interface(ATM 分段和重設(shè)裝置帶SBUS主機接口)
TNETA1561 ATM Segmentation and Reassembly Device with PCI Host Interface(ATM 分段和重設(shè)裝置帶SBUS主機接口)
TNETA1600 SONET/SDH ATM Receiver/Transmitter for 622.08-Mit/s or 155.52-Mbit/s Operation(SONET/SDH ATM接收器/傳送器)
TNETA1610 STS-12c/STM-4 Receiver/Transmitter with Clock Recovery/Generation(STS-12C/STM-4接收/傳送器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TNETA1555DW 制造商:Rochester Electronics LLC 功能描述:- Bulk
TNETA1560MFP 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述:
TNETA1560PGC 制造商:Rochester Electronics LLC 功能描述:- Bulk
TNETA1561PGC 制造商:Rochester Electronics LLC 功能描述:- Bulk
TNETA1570 制造商:TI 制造商全稱:Texas Instruments 功能描述:ATM SEGMENTATION AND REASSEMBLY DEVICE WITH INTEGRATED 64-BIT PCI-HOST INTERFACE
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*