參數(shù)資料
型號(hào)： TMS570LS10216ASZWTQR
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 160 MHz, RISC MICROCONTROLLER, PBGA337
封裝： GERRN, PLASTIC, NFBGA-337
文件頁(yè)數(shù)： 66/102頁(yè)
文件大?。?/td> 1146K
代理商： TMS570LS10216ASZWTQR
PRODUCTPREVIEW
OSCIN
OSCOUT
C1
(see Note A)
C2
Crystal
(a)
(b)
External
(toggling 0-1.5V)
Clock Signal
Kelvin_GND
(see Note B)
OSCOUT
OSCIN
SPNS141D – AUGUST 2010 – REVISED JANUARY 2011
www.ti.com
7
Peripheral and Electrical Specifications
7.1
Clocks
7.1.1
PLL And Clock Specifications
Table 7-1. Timing Requirements For PLL Circuits Enabled Or Disabled
MIN
MAX
Unit
f(OSC)
Input clock frequency
5
20
MHz
tc(OSC)
Cycle time, OSCIN
50
ns
tw(OSCIL)
Pulse duration, OSCIN low
15
ns
tw(OSCIH)
Pulse duration, OSCIN high
15
ns
f(OSCRST)
OSC FAIL frequency - upper level
20
50
MHz
f(OSCRST)
OSC FAIL frequency - lower level
1.5
5
MHz
7.1.2
External Reference Resonator/Crystal Oscillator Clock Option
The oscillator is enabled by connecting the appropriate fundamental 5–20 MHz resonator/crystal and load
capacitors across the external OSCIN and OSCOUT pins as shown in section (a) of the figure below. The
oscillator is a single stage inverter held in bias by an integrated bias resistor. This resistor is disabled
during leakage test measurement and HALT mode.
NOTE
TI strongly encourages each customer to submit samples of the device to the
resonator/crystal vendors for validation. The vendors are equipped to determine what load
capacitors will best tune their resonator/crystal to the microcontroller device for optimum
start-up and operation over temperature/voltage extremes.
An external oscillator source can be used by connecting a 1.5V clock signal to the OSCIN pin and leaving
the OSCOUT pin unconnected (open) as shown in section (b) of the figure below.
Figure 7-1. Recommended Crystal/Clock Connection
NOTE
In figure (a), The values of C1 and C2 should be provided by the resonator/crystal vendor.
In figure (b), Kelvin_GND should not be connected to any other GND.
7.1.3
Validated FMPLL Setting
The following table includes the validated FMPLL settings.
66
Peripheral and Electrical Specifications
Copyright 2010–2011, Texas Instruments Incorporated
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