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| 型號： | TMS320LC541-66 |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Digital Signal Processor |
| 中文描述： | 數(shù)字信號處理器 |
| 文件頁數(shù)： | 31/111頁 |
| 文件大?。?/td> | 1426K |
| 代理商： | TMS320LC541-66 |
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TMS320C54x, TMS320LC54x, TMS320VC54x
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS039C – FEBRUARY 1996 – REVISED DECEMBER 1999
31
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
serial ports (continued)
Table 3 provides a comparison of the serial ports available in the ’54x devices.
Table 3. Serial Port Configurations for the ’54x
DEVICE
NO. OF STANDARD
SERIAL PORTS
NO. OF BSPs
(BSP ADDRESS RANGES)
NO. OF TDM
SERIAL PORTS
TMS320C541
TMS320LC541
2
–
–
TMS320C542
TMS320LC542
1 (0800h 0FFFh)
1 (0800h–0FFFh)
1
–
TMS320LC543
–
1 (0800h–0FFFh)
1
TMS320LC545
TMS320LC545A
1
1 (0800h 0FFFh)
1 (0800h–0FFFh)
–
TMS320LC546
TMS320LC546A
1
1 (0800h 0FFFh)
1 (0800h–0FFFh)
–
TMS320LC548
–
2 (0800h–0FFFh
and 1800h–1FFFh)
1
TMS320LC549
TMS320VC549
–
2 (0800h–0FFFh
and 1800h–1FFFh)
1
hardware timer
The ’54x devices feature a 16-bit timing circuit with a four-bit prescaler. The timer counter is decremented by
one at every CLKOUT cycle. Each time the counter decrements to zero, a timer interrupt is generated. The timer
can be stopped, restarted, reset, or disabled by specific status bits.
clock generator
The clock generator provides clocks to the ’54x device, and consists of an internal oscillator and a phase-locked
loop (PLL) circuit. The clock generator requires a reference clock input, which can be provided by using a crystal
resonator with the internal oscillator, or from an external clock source. The reference clock input is then either
divided by two (or by four on the ’545A, ’546A, ’548, and ’549) to generate clocks for the ’54x device, or the PLL
circuit can be used to generate the device clock by multiplying the reference clock frequency by a scale factor,
allowing use of a clock source with a lower frequency than that of the CPU.
The PLL is an adaptive circuit that, once synchronized, locks onto and tracks an input clock signal. When the
PLL is initially started, it enters a transitional mode during which the PLL acquires lock with the input signal. Once
the PLL is locked, it continues to track and maintain synchronization with the input signal. Then, other internal
clock circuitry allows the synthesis of new clock frequencies for use as master clock for the ’54x device.
Two types of PLL are available: a hardware-programmable PLL and a software-programmable PLL. All ’54x
devices have the hardware-programmable PLL except the ’545A, ’546A, ’548, and ’549, which have the
software-programmable PLL. On the hardware-programmable PLL, an external delay must be provided before
the device is released from reset in order for the PLL to achieve lock. With the software-programmable PLL,
a lock timer is provided to implement this delay automatically. Note that both the hardware- and the
software-programmable PLLs require the device to be reset after power up to begin functioning properly.
hardware-programmable PLL
The ’54x can use either the internal oscillator or an external frequency source for an input clock. The clock
generation mode is determined by the CLKMD1, CLKMD2 and CLKMD3 clock mode pins except on the ’545A,
the ’546A, the ’548, and the ’549 (see software-programmable PLL description below). Table 4 outlines the
selection of the clock mode by these pins. Note that both the hardware- and the software-programmable PLLs
require the device to be reset after power up to begin functioning properly.
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| TMS320LC541BPZ-66 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Fixed-Pt Dig Sig Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320LC541PZ1-40 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320LC541PZ2-40 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320LC542PBK1-50 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320LC542PBK2-50 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
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