參數(shù)資料
型號： TMS320F240PQQ
英文描述： 16-Bit Microcontroller
中文描述： 16位微控制器
文件頁數(shù)： 49/105頁
文件大小： 1481K
代理商： TMS320F240PQQ
TMS320C240, TMS320F240
DSP CONTROLLERS
SPRS042D – OCTOBER 1996 – REVISED NOVEMBER 1998
49
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
watchdog (WD) and real-time interrupt (RTI) module
The TMS320C240 device includes a watchdog (WD) timer and a real-time interrupt (RTI) module. The WD
function of this module monitors software and hardware operation by generating a system reset if it is not
periodically serviced by software by having the correct key written. The RTI function provides interrupts at
programmable intervals. See Figure 15 for a block diagram of the WD/RTI module. The WD/RTI module
features include the following:
WD Timer
–
Seven different WD overflow rates ranging from 15.63 ms to 1 s
–
A WD-reset key (WDKEY) register that clears the WD counter when a correct value is written, and
generates a system reset if an incorrect value is written to the register
–
A WD flag (WD FLAG) that indicates whether the WD timer initiated a system reset
–
WD check bits that initiate a system reset if an incorrect value is written to the WD control register
(WDCR)
Automatic activation of the WD timer, once system reset is released
–
Three WD control registers located in control register frame beginning at address 7020h.
Real-time interrupt (RTI):
–
Interrupt generation at a programmable frequency of 1 to 4096 interrupts per second
–
Interrupt or polled operation
–
Two RTI control registers located in control register frame beginning at address 7020h.
NOTE: All registers in this module are 8-bit registers that are connected to the 16-bit peripheral bus. When a register is accessed, the register
data is in the lower byte (7–0), and the upper byte (15–8) is read as zeros. Writing to the upper byte has no effect.
Figure 15 shows the WD/RTI block diagram.
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