參數(shù)資料
型號: TMS320C82GGP-60
元件分類: 數(shù)字信號處理
英文描述: 32-Bit Digital Signal Processor
中文描述: 32位數(shù)字信號處理器
文件頁數(shù): 85/132頁
文件大小: 1707K
代理商: TMS320C82GGP-60
SPRS145G
JULY 2000
REVISED FEBRUARY 2002
85
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
RS timings (continued)
switching characteristics over recommended operating conditions for a reset [H = 0.5t
c(CO)
]
(see Figure 28)
PARAMETER
MIN
MAX
UNIT
tw(RSL1)
td(EX)
tp
The parameter tw(RSL1) refers to the time RS is an output.
Pulse duration, RS low
128tc(CI)
ns
Delay time, reset vector executed after PLL lock time
36H
ns
PLL lock time (input cycles)
4096tc(CI)
ns
XTAL1
Address/
Data/
Control
XTAL1 refers to internal oscillator clock if on-chip oscillator is used.
CLKOUT
RS
tw(RSL1)
tp
td(EX)
CLKIN
BOOT_EN
/XF
BOOT_EN
I/Os
XF
Code-Dependent
Address/Data/Control Valid
Hi-Z
Figure 28. Watchdog Initiated Reset
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