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參數(shù)資料
| 型號： | TMPR3922AU |
| 廠商： | Toshiba Corporation |
| 英文描述： | 32-bit RISC Microprocessor for PDA（Personal Digital Assistants)(32位 精簡指令集系統(tǒng)計算機微處理器，用于掌上電腦PDA) |
| 中文描述： | 32位RISC微處理器的PDA（個人數(shù)字助理）（32位精簡指令集系統(tǒng)計算機微處理器，用于掌上電腦PDA）的 |
| 文件頁數(shù)： | 11/45頁 |
| 文件大?。?/td> | 343K |
| 代理商： | TMPR3922AU |
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2-FEB-1999
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TMPR3922AU
CHI Pins
NAME
CHIFS
I/O
I/O
DESCRIPTION
This pin is the CHI frame synchronization signal. This pin is available for use in
one of two modes. As an output, this pin allows the TMPR3922AU to be the
master CHI sync source. As an input, this pin allows an external peripheral to be
the master CHI sync source and the TMPR3922AU CHI module will slave to this
external sync.
This pin is the CHI clock signal. This pin is available for use in one of two
modes. As an output, this pin allows the TMPR3922AU to be the master CHI
clock source. As an input, this pin allows an external peripheral to be the master
CHI clock source and the TMPR3922AU CHI module will slave to this external
clock.
This pin is the CHI serial data output signal.
This pin is the CHI serial data inaut signal.
CHICLK
I/O
CHIDOUT
CHIDIN
O
I
IO Pins
NAME
IO[15:0]
I/O
I/O
DESCRIPTION
These pins are general purpose input/output ports. Each port can be
independently programmed as an input or output port. Each port can generate a
separate positive and negative edge interrupt. Each port can also be
independently programmed to use a 16 to 24ms debouncer.
Reset Pins
NAME
CPURES*
I/O
I
DESCRIPTION
This pin is used to reset the CPU core. This pin should be connected to a
switch for initiating a reset in the event that a software problem might hang the
CPU core. The pin should also be pulled up to VSTANDBY
through an
external pull-up resistor.
This pin serves as the Power On Reset signal for the TMPR3922AU. This
signal must remain low when VSTANDBY is asserted until VSTANDBY is
stable. Once VSTANDBY
is asserted, this signal should never go low unless
all power is lost in the system.
This signal provides power for the TMPR3922AU and other components in the system
that must never lose power. This signal should always be asserted if there is either a
good Main Backup Battery, or if a Battery Charger is plugged in.
PON*
I
VSTANDBY :
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