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參數(shù)資料
| 型號： | TMP86PS64FG |
| 廠商： | Toshiba Corporation |
| 英文描述： | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 6.9 to 7.2; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| 中文描述： | 8位微控制器 |
| 文件頁數(shù)： | 163/210頁 |
| 文件大?。?/td> | 1455K |
| 代理商： | TMP86PS64FG |
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TMP86PS64FG
When an external clock is used, the shift operation is synchronized with the external clock; therefore, the
previous data are read before the next data are transferred to the data buffer register. If the previous data have
not been read, the next data will not be transferred to the data buffer register and the receiving of any more data
will be canceled. When an external clock is used, the maximum transfer speed is determined by the delay
between the time when the interrupt request is generated and when the data received have been read.
The receiving is ended by clearing SIO1CR1<SIOS> to “0” or setting SIO1CR1<SIOINH> to “1” in buffer
full interrupt service program.
When SIO1CR1<SIOS> is cleared, the current data are transferred to the buffer. After SIO1CR1<SIOS>
cleared, the receiving is ended at the time that the final bit of the data has been received. That the receiving has
ended can be determined from the status of SIO1SR<SIOF>. SIO1SR<SIOF> is cleared to “0” when the
receiving is ended. After confirmed the receiving termination, the final receiving data is read. When
SIO1CR1<SIOINH> is set, the receiving is immediately ended and SIO1SR<SIOF> is cleared to “0”. (The
received data is ignored, and it is not required to be read out.)
If it is necessary to change the number of words in external clock operation, SIO1CR1<SIOS> should be
cleared to “0” then SIO1CR2<BUF> must be rewritten after confirming that SIO1SR<SIOF> has been cleared
to “0”. If it is necessary to change the number of words in internal clock, during automatic-wait operation
which occurs after completion of data receiving, SIO1CR2<BUF> must be rewritten before the received data is
read out.
Note:The buffer contents are lost when the transfer mode is switched. If it should become necessary to switch the
transfer mode, end receiving by clearing SIO1CR1<SIOS> to “0”, read the last data and then switch the trans-
fer mode.
Figure 15-10 Receive Mode (Example: 8bit, 1word transfer, Internal clock)
15.6.3 8-bit transfer / receive mode
After setting the SIO control register to the 8-bit transmit/receive mode, write the data to be transmitted first
to the data buffer registers (DBR). After that, enable the transmit/receive by setting SIO1CR1<SIOS> to “1”.
When transmitting, the data are output from the SO1 pin at leading edges of the serial clock. When receiving,
the data are input to the SI1 pin at the trailing edges of the serial clock. When the all receive is enabled, 8-bit
data are transferred from the shift register to the data buffer register. An INTSIO1 interrupt is generated when
the number of data words specified with the SIO1CR2<BUF> has been transferred. Usually, read the receive
data from the buffer register in the interrupt service. The data buffer register is used for both transmitting and
receiving; therefore, always write the data to be transmitted after reading the all received data.
When the internal clock is used, a wait is initiated until the received data are read and the next transfer data
are written. A wait will not be initiated if even one transfer data word has been written.
a
1
a
0
a
2
a
3
a
4
a
5
a
6
a
7
b
0
b
1
b
2
b
3
b
4
b
5
b
6
b
7
DBR
b
a
Clear SIOS
Read out
Read out
SCK1 pin
(Output)
SI1 pin
INTSIO1 Interrupt
SIO1CR1<SIOS>
SIO1SR<SIOF>
SIO1SR<SEF>
相關(guān)PDF資料 |
PDF描述 |
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| TMP87C409BMG | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 7.0 to 7.3; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| TMP87C409BNG | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 7.2 to 7.6; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| TMP87C809BMG | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 7.3 to 7.7; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| TMP87C809BNG | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
| TMP87C446N | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
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| TMP87C408 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| TMP87C408DM | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:CMOS 8-BIT MICROCONTROLLER |
| TMP87C408LM | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:CMOS 8-BIT MICROCONTROLLER |
| TMP87C408LN | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:CMOS 8-BIT MICROCONTROLLER |
| TMP87C408M | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:CMOS 8-BIT MICROCONTROLLER |
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