參數(shù)資料
型號(hào)： TLV5630EVM
廠商： Texas Instruments, Inc.
英文描述： TLV5630 Evaluation Module(TLC5630評(píng)估板)
中文描述： TLV5630評(píng)估模塊（TLC5630評(píng)估板）
文件頁(yè)數(shù)： 9/32頁(yè)
文件大?。?/td> 395K
代理商： TLV5630EVM
EVM Basic Functions
1-3
EVM Overview
jumpers allows the frame sync signal to be routed to the data converter. W14
provides a chip select signal to U5 (pulls CS low). One, two, or all three DACs
can be operated at the same time.
The onboard clock is fed through a 4-bit binary counter whose terminal count
output is delayed one clock cycle and used as the DAC frame sync. In test
mode, frame sync is common to all DACs. The test mode frame sync signal
is inverted and used as the parallel-load enable signal to U10. This inverted
signal also clears the binary counter (U9).
The two 8-channel data converters (U3 and U4) on this EVM support
daisy-chainingof the serial input data. Jumpers W6 and W9 support the daisy
chain devices. Jumper W11 allows the EVM user to configure the serial data
source.
The EVM uses four banks of 4-bit switches to create a 16-bit serial word to the
data converters. This is accomplished through the use of parallel-load serial
shift registers U8 and U10. The internal configuration registers of the DACs
can be set, and serial data can be simulated.
1.2.2
Testing With a Processor
When operated outside of the test mode (W13 open), the DACs expect to
receive their control signals and serial data input from a host processor. The
EVM works with TI’s DSK series of digital signal processor evaluation boards
that support the common connector interface described in TMS320C6000
EVM Daughterboard Interface Application Report(literature number
SPRA478). Connectors J10 and J11, located on the underside of the EVM,
provide the DSP interface.
Connectors J6, J7, and J8 allow the EVM user to define a custom processor
interface. The shorting bars on J7 and J8 can be removed, allowing the EVM
user to interface to older DSKs, micro controllers, or pattern generators.
1.2.2.1
EVM Address Bus
Address decoder U13 determines access to each data converter. A two-bit
address bus on the EVM can be accessed via J9, or daughterboard connector
J10. For TMS320C6000 systems using the common connector, jumper block
W2 allows the user to select any two of the high order address bits A14, A15,
A16 or A17.
Note:
Address lines may vary depending on the DSP being used. Check your DSP
EVM documentation for the specific address line mapping.
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