參數(shù)資料
型號(hào)： TLV5614IYZR
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： DAC
英文描述： SERIAL INPUT LOADING, 9 us SETTLING TIME, 12-BIT DAC, UUC16
封裝： GREEN, DIE-16
文件頁(yè)數(shù)： 22/25頁(yè)
文件大小： 500K
代理商： TLV5614IYZR
www.ti.com
SBAS401 – DECEMBER 2006
Table 1. TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
DESCRIPTION
AGND
9
—
Analog ground
AVDD
16
—
Analog supply
CS
6
I
Chip select. This terminal is active low.
DGND
8
—
Digital ground
DIN
4
I
Serial data input
DVDD
1
—
Digital supply
Frame sync input. The falling edge of the frame sync pulse indicates the start of a serial
I
FS
7
data frame shifted out to the TLV5614IYZ.
Power-down pin. Powers down all DACs (overriding the individual power down settings), and
I
PD
2
all output stages. This terminal is active low.
Load DAC. When the LDAC signal is high, no DAC output updates occur when the input
I
digital data is read into the serial interface. The DAC outputs are only updated when LDAC
LDAC
3
is low.
REFINAB
15
I
Voltage reference input for DACs A and B.
REFINCD
10
I
Voltage reference input for DACs C and D.
SCLK
5
I
Serial clock inputinput
OUTA
14
O
DACA output
OUTB
13
O
DACB output
OUTC
12
O
DACC output
OUTD
11
O
DACD output
6
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