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參數(shù)資料
| 型號： | TLC34058-110M |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 256 ?24 COLOR PALETTE |
| 中文描述： | 256？24調(diào)色板 |
| 文件頁數(shù)： | 12/21頁 |
| 文件大小： | 322K |
| 代理商： | TLC34058-110M |
TLC34058-110M
256
×
24 COLOR PALETTE
SGLS075 – JANUARY 1994
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
APPLICATION INFORMATION
device ground plane
Use of a four-layer PC board is recommended. All the ground pins, voltage reference circuitry, power supply
bypass circuitry, analog output signals, and digital signals as well as any output amplifiers should have a
common ground plane.
device analog power plane (APP)
The device plus associated analog circuitry should have a separate analog power plane (APP) for V
DD
. The APP
powers the device, voltage reference circuitry, and any output amplifiers. It is connected to the overall PCB
power plane (V
DD
) at a single point through a ferrite bead, which should be within three inches of the device.
This connection is shown in Figure 4.
PCB power plane and PCB ground plane
The PCB power plane powers the digital circuitry. The PCB power plane and PCB ground planes should not
overlay the APP unless the plane-to-plane noise is common mode.
supply decoupling
Bypass capacitors should have the shortest possible lead lengths to reduce lead inductance. For best results,
connect a parallel combination of 0.1-
μ
F ceramic and 0.01-
μ
F chip capacitors from each V
DD
to GND. If chip
capacitors are not feasible, radial-lead ceramic capacitors may be substituted. These capacitors should be
located as close to the device as possible.
The performance of the internal power supply noise-rejection circuitry decreases with noise frequency. If a
switching power supply is used for V
DD
, close attention must be paid to reducing power supply noise. To reduce
such noise, power the APP with a three-terminal voltage regulator.
digital interconnect
Isolate the digital inputs from the analog outputs and other analog circuitry as much as possible. Shielding the
digital inputs reduces noise on the power and ground lines. Minimize the lengths of clock and data lines to
prevent high-frequency clock and data information from inducing noise into the analog part of the video system.
Active termination resistors for the digital inputs should be connected to the PCB power plane, not the APP.
Ensure that these digital inputs do not overlay the device ground plane.
analog signal interconnect
Minimizing the lead lengths between groups of V
DD
and GND minimizes inductive ringing. To minimize noise
pickup due to reflections and impedance mismatch, locate the device as close to the output connectors as
possible. The external voltage reference should also be as close to the device as possible to minimize noise
pickup. To maximize high-frequency supply voltage rejection, overlay the video output signals to the device
ground plane and not the APP.
Each analog output has a 75-
load resistor connected to GND for maximum performance. To minimize
reflections, the resistor connections between current output and ground should be as close to the device as
possible.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TLC34058-110MGA | 制造商:TI 制造商全稱:Texas Instruments 功能描述:256 x 24 COLOR PALETTE |
| TLC34058-110MGAB | 制造商:TI 制造商全稱:Texas Instruments 功能描述:256 ?? 24 COLOR PALETTE |
| TLC34058-110MHFG | 制造商:TI 制造商全稱:Texas Instruments 功能描述:256 x 24 COLOR PALETTE |
| TLC34058-135FN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:256 ?? 24 COLOR PALETTE |
| TLC34058-80FN | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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