參數(shù)資料
型號(hào)： TLC320AD50CPTR
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PQFP48
封裝： PLASTIC, QFP-48
文件頁(yè)數(shù)： 42/56頁(yè)
文件大?。?/td> 555K
代理商： TLC320AD50CPTR
6–2
6.2
Control Register 2
Table 6–3. Control Register 2
D7
D6
D5
D4
D3
D2
D1
D0
DESCRIPTION
X
–
FLAG output value
–
1
–
Phone mode enable
–
0
–
Phone mode disable
–
X
–
Decimator FIR overflow flag (valid only during read cycle)
–
1
–
16-bit ADC mode
–
0
–
Not-16-bit ADC mode [(15+1)– bit mode]
–
X
0
Reserved (TLC320AD50C only)
–
0
FSD enable (TLC320AD52C only)
–
1
–
FSD disable (TLC320AD52C only)
–
1
–
Analog loopback enabled
–
0
–
Analog loopback disabled
Default value: 00000000
Writing 0s to the reserved bits is suggested.
6.3
Control Register 3
The following command contains the frame-sync delay (FSD) register address and loads D7 (MSB)–D0 into the FSD
register. The data byte (D5–D0) determines the number of SCLKs between FS and the delayed frame-sync signal,
FSD. The minimum data value for this portion of the register, bits D5–D0, is decimal 18.
Table 6–4. Control Register 3
D7
D6
D5
D4
D3
D2
D1
D0
DESCRIPTION
–
X
Number of SCLKs between FS and FSD
X
–
Binary number of slave devices (3 maximum for TLC320AC50C, 1 maximum for
TLC320AC52C)
Default value: 00000000
Writing 0s to the reserved bits is suggested.
6.4
Control Register 4
Table 6–5. Control Register 4
D7
D6
D5
D4
D3
D2
D1
D0
DESCRIPTION
–
1
–
Analog input gain = mute
–
1
0
–
Analog input gain = 12 dB
–
0
1
–
Analog input gain = 6 dB
–
0
–
Analog input gain = 0 dB
–
1
Analog output gain = mute
–
1
0
Analog output gain = – 12 dB
–
0
1
Analog output gain = – 6 dB
–
0
Analog output gain = 0 dB
–
X
–
Sample frequency select (N): fs = MCLK/(128 N) or MCLK/(512 N)
1
–
Bypass internal DPLL
0
–
Enable internal DPLL
Default value: 00000000
The value of the sample frequency divisor, N, is determined by the octal representation of bits D4–D6. Hence,
001 = 1, 010 = 2, etc. By setting D4–D6 to 000, N = 8 is selected.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLC320AD50I 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION
TLC320AD50IDW 功能描述:接口—CODEC SNGL CH Codec RoHS:否 制造商:Texas Instruments 類(lèi)型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類(lèi)型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLC320AD50IPT 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION
TLC320AD52CDW 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION
TLC320AD52CPT 功能描述:IC ANALOG INTERFACE W/MS 48-LQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類(lèi)型:PCM 數(shù)據(jù)接口:PCM 音頻接口 分辨率（位）:15 b ADC / DAC 數(shù)量:1 / 1 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):- 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):- 電壓 - 電源，模擬:2.7 V ~ 3.3 V 電壓 - 電源，數(shù)字:2.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:80-VFBGA 供應(yīng)商設(shè)備封裝:80-BGA MICROSTAR JUNIOR（5x5） 包裝:帶卷 (TR) 其它名稱(chēng):296-21257-2
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