參數(shù)資料
型號: TLC2932AIPWR
廠商: TEXAS INSTRUMENTS INC
元件分類: PLL合成/DDS/VCOs
英文描述: PHASE LOCKED LOOP, 38 MHz, PDSO14
封裝: GREEN, PLASTIC, TSSOP-14
文件頁數(shù): 23/23頁
文件大小: 531K
代理商: TLC2932AIPWR
TLC2932A
HIGH PERFORMANCE PHASE LOCKED LOOP
SLES150 OCTOBER 2005
9
TI.COM
operation characteristics, VDD = 5 V, TA = 25°C (unless otherwise noted)
VCO section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
fOSC
Operation oscillation frequency
RBIAS = 3.3 k, VCO IN = 1/2 VDD
37
57
75
MHz
fSTB
Time to stable oscillation (see Note 20)
10
us
tr
Rise time
CL = 15 pF
7.5
10
ns
tf
Fall time
CL = 15 pF
6.4
10
ns
fDUTY
Duty cycle at VCO OUT
RBIAS = 3.3 k, VCO IN = 1/2 VDD
45%
50%
55%
α (fOSC)
Temperature coefficient of oscillation
frequency
VCO IN = 1/2 VDD, TA = –20°C to
75
°C
–0.346
%/
°C
kSVS(fOS
C)
Supply voltage coefficient of oscillation
frequency
VCO IN = 1/2 VDD, VDD = 4.75 V
to 5.25 V
0.002
%/mV
Jitter absolute (see Note 21)
PLL jitter, N = 128
145
ps
NOTES: 20. The time period to the stable VCO oscillation frequency after the VCO INHIBIT terminal is changed to a low level.
21. Jitter performance is highly dependent on circuit layout and external device characteristics. The jitter specification was made with
a carefully deigned PCB with no device socket.
PFD section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
fmax
Maximum operation frequency
38
MHz
tPLZ
PFD output disable time from low level
20
40
ns
tPHZ
PFD output disable time from high level
20
40
ns
tPZL
PFD output enable time to low level
4
20
ns
tPZH
PFD output enable time to high level
4.3
20
ns
tr
Rise time
CL = 15 pF
2.1
10
ns
tf
Fall time
CL = 15 pF
1.3
10
ns
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