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參數(shù)資料
| 型號： | TFDS6502E-TR3 |
| 廠商： | VISHAY SEMICONDUCTORS |
| 元件分類： | 其它接口 |
| 英文描述： | SPECIALTY INTERFACE CIRCUIT, XMA8 |
| 封裝： | 13 X 5.95 X 5.30 MM, SIDE VIEW-8 |
| 文件頁數(shù)： | 14/18頁 |
| 文件大?。?/td> | 690K |
| 代理商： | TFDS6502E-TR3 |
TFDU6102E/TFDS6402/TFDS6502E/TFDT6502E
Vishay Semiconductor
Rev. B1.6, 02–Nov–00
5
www.vishay.com
Document Number 82526
Electrical Characteristics
Tamb = 25_C, VCC = 2.6V to 5.5 V unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameters
Test Conditions / Pins
Symbol
Min.
Typ.
Max.
Unit
Transceiver
Supply Voltage
VCC
2.6
5.5
V
Dynamic Supply Current
Receive mode only.
In transmit mode, add additional 85 mA (typ) for IRED current
SD = Low, Ee = 0 klx
ICC
3
4.5
mA
SD = Low, Ee = 1 klx *)
ICC
3
4.5
mA
Standby Supply Current
SD = High,
Mode = Floating,
ISD
Mode
Floating,
T = 25
°C, Ee = 0 klx
T = 25
°C, Ee = 1 klx *)
1
1.5
A
SD = High, T = 85
°C,
Mode = Floating,
Not Ambient Light
Sensitive
ISD
5
A
Operating Temperature
Range
TA
–25
+85
°C
Output Voltage Low
Rload = 2.2 kW,
Cload = 15 pF
VOL
0.5
0.8
V
Output Voltage High
Rload = 2.2 kW,
Cload = 15 pF
VOH
VCC–0.5
V
Input Voltage Low
(Txd, SD/ Mode, Mode)
VIL
0
0.8
V
Input Voltage High
CMOS level **)
VIH
0.9 x VCC
V
In ut Voltage High
(Txd, SD/ Mode, Mode)
TTL level, VCC ≥ 4.5 V
VIH
2.4
V
Input Leakage Current
(Txd, SD/ Mode)
IL
–10
+10
A
Input Leakage Current,
Mode
IL
–80
+80
A
Input Capacitance
CI
5
pF
*)
Standard Illuminant A
**)
The typical threshold level is between 0.5 x VCC/2 (VCC = 3 V) and 0.4 x VCC (VCC = 5.5 V) .
It is recommended to use the specified min/ max values to avoid increased operating current.
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