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| 型號(hào)： | TFDS6502E-TR3 |
| 廠商： | VISHAY SEMICONDUCTORS |
| 元件分類： | 其它接口 |
| 英文描述： | SPECIALTY INTERFACE CIRCUIT, XMA8 |
| 封裝： | 13 X 5.95 X 5.30 MM, SIDE VIEW-8 |
| 文件頁數(shù)： | 13/18頁 |
| 文件大?。?/td> | 690K |
| 代理商： | TFDS6502E-TR3 |
TFDU6102E/TFDS6402/TFDS6502E/TFDT6502E
Vishay Semiconductor
Rev. B1.6, 02–Nov–00
4
www.vishay.com
Document Number 82526
Absolute Maximum Ratings
Reference point Pin: GND unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameters
Test Conditions
Symbol
Min.
Typ.
Max.
Unit
Supply Voltage Range,
Transceiver
0 V <VCC2 <6 V
VCC1
– 0.5
6
V
Supply Voltage Range,
Transmitter
0 V <VCC1 <6 V
VCC2
– 0.5
6
V
Input Currents
For all Pins, Except IRED
Anode Pin
10
mA
Output Sinking Current
25
mA
Power Dissipation
See Derating Curve
PD
350
mW
Junction Temperature
TJ
125
°C
Ambient Temperature
Range (Operating)
Tamb
–25
+85
°C
Storage Temperature
Range
Tstg
–25
+85
°C
Soldering Temperature
See Recommended Solder
Profile (see Figure 11)
240
°C
Average Output Current
IIRED (DC)
130
mA
Repetitive Pulsed Output
Current
<90
s, ton <20%
IIRED (RP)
600
mA
IRED Anode Voltage
VIREDA
– 0.5
6
V
Transmitter Data Input
Voltage
VTxd
– 0.5
VCC1 +0.5
V
Receiver Data Output
Voltage
VRxd
– 0.5
VCC1 +0.5
V
Virtual Source Size
Method:
(1–1/e) encircled energy
d
2.5
2.8
mm
Maximum Intensity for
Class 1 Operation of
IEC825–1 or EN60825–1
(worst case IrDA FIR
pulse pattern)
EN60825, 1997,
unidirectional operation,
worst case test mode
320
mW/sr
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