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參數(shù)資料
| 型號： | TDA7546TR |
| 廠商： | 意法半導體 |
| 英文描述： | Multichip module for TMC tuner applications |
| 中文描述： | 豐田汽車多芯片模塊調(diào)諧器應用 |
| 文件頁數(shù)： | 26/68頁 |
| 文件大小： | 823K |
| 代理商： | TDA7546TR |
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Functional description
TDA7546
26/68
The last bit of the start instruction defines the type of operation to be performed:
–
When set to "1", a read operation is selected
–
When set to "0", a write operation is selected
The TDA7512F connected to the bus will compare their own hardwired address with the
slave address being transmitted, after detecting a START condition. After this comparison,
the TDA7512F will generate an "acknowledge" on the SDA line and will do either a read or a
write operation according to the state of R/W bit.
Write operation
Following a START condition the master sends a slave address word with the R/W bit set to
"0". The device will generate an "acknowledge" after this first transmission and will wait for a
second word (the word address field). This 8-bit address field provides an access to any of
the 32 internal addresses.
Upon receipt of the word address the TDA7512F slave device will respond with an
"acknowledge". At this time, all the following words transmitted to the TDA7512F will be
considered as Data.
The internal address will be automatically incremented. After each word receipt the
TDA7512F will answer with an "acknowledge".
Read operation
If the master sends a slave address word with the R/W bit set to "1", the TDA7512F will
transit one 8-bit data word. This data word includes the following informations:
bit0 (ISS filter, 1 = ON, 0 = OFF)
bit1 (ISS filter bandwidth, 1 = 80KHz, 0 = 120KHz)
bit2 (MPOUT,1 = multipath present, 0 = no multipath)
bit3 (1 = PLL is locked in , 0 = PLL is locked out).
bit4 (fieldstrength indicator, 1 = lower as softmute threshold, 0 = higher as softmute
threshold)
bit5 (adjacent channel indicator, 1 = adjacent channel present, 0 = no adjacent channel)
bit6 (deviation indicator, 1 = strong overdeviation present, 0 = no strong overdeviation)
bit7 (deviation indicator, 1 = overdeviation present, 0 = no overdeviation)
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