參數(shù)資料
型號(hào)： TCS59SM804BFTL-75
廠商： Toshiba Corporation
英文描述： 16M×4Banks×4Bits Synchronous DRAM(4組16M×4位同步動(dòng)態(tài)RAM)
中文描述： 1,600 × 4Banks × 4Bits同步DRAM（4組1,600 × 4位同步動(dòng)態(tài)RAM）的
文件頁(yè)數(shù)： 29/49頁(yè)
文件大小： 2423K
代理商： TCS59SM804BFTL-75
TC59SM816/08/04BFT/BFTL-70,-75,-80
2000-03-14 29/49
PIN FUNCTIONS
CLOCK INPUT: CLK
The CLK input is used as the reference for SDRAM operations. Operations are synchronized to the positive
edges of CLK.
CLOCK ENABLE: CKE
The CKE input is used to suspend the internal CLK. When the CKE signal is asserted “l(fā)ow”, the internal
CLK is suspended and output data is held intact while CKE is asserted “l(fā)ow”. When the device is not running a
Burst cycle, the CKE input controls the entry to the Power Down and Self Refresh modes. When the Self
Refresh command is issued, the device must be in the idle state.
BANK SELECT: BS0, BS1
The TC59SM816BFT/BFTL, TC59SM808BFT/BFTL and the TC59SM804BFT/BFTL are organized as
four-bank memory cell arrays. The BS0, BS1 inputs are latched at the time of assertion of the operation
commands and selects the bank to be used for the operation.
BS0
BS1
0
0
Bank#0
1
0
Bank#1
0
1
Bank#2
1
1
Bank#3
ADDRESS INPUTS: A0~A12
The A0~A12 inputs are address to access the memory cell array, as following table.
Row Address
Column Address
TC59SM816BFT/BFTL
A0~A12
A0~A8
TC59SM808BFT/BFTL
A0~A12
A0~A9
TC59SM804BFT/BFTL
A0~A12
A0~A9, A11
The row address bits are latched at the Bank Activate command and column address bits are latched on the
Read or Write command. Also, the A0~A12 inputs are used to set the data in the Mode register in a Mode
Register Set cycle.
相關(guān)PDF資料
PDF描述
TCS59SM804BFTL-80 16M×4Banks×4Bits Synchronous DRAM(4組16M×4位同步動(dòng)態(tài)RAM)
TCS59SM808BFT-75 8M×4Banks×8Bits Synchronous DRAM(4組8M×8位同步動(dòng)態(tài)RAM)
TCS59SM808BFT-80 8M×4Banks×8Bits Synchronous DRAM(4組8M×8位同步動(dòng)態(tài)RAM)
TCS59SM808BFTL-70 8M×4Banks×8Bits Synchronous DRAM(4組8M×8位同步動(dòng)態(tài)RAM)
TCS59SM808BFTL-75 8M×4Banks×8Bits Synchronous DRAM(4組8M×8位同步動(dòng)態(tài)RAM)
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