參數(shù)資料
型號: TC1271ARVCTTR
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5
封裝: LEAD FREE, PLASTIC, SOT-23, 5 PIN
文件頁數(shù): 20/48頁
文件大?。?/td> 541K
代理商: TC1271ARVCTTR
2007-2011 Microchip Technology Inc.
DS22035D-page 27
TC1270A/70AN/71A
5.6
Controllers and Processors With
Bidirectional I/O Pins
Some microcontrollers have bidirectional Reset pins.
Depending on the current drive capability of the
controller pin, an indeterminate logic level may result if
there is a logic conflict. This can be avoided by adding
a 4.7 k
resistor in series with the output of the
TC127XA (Figure 5-7). If there are other components
in the system that require a Reset signal, they should
be buffered so as not to load the Reset line. If the other
components are required to follow the Reset I/O of the
microcontroller, the buffer should be connected as
shown with the solid line.
FIGURE 5-7:
Interfacing the TC1270A or
TC1271A Push-Pull Output to a Bidirectional
Reset I/O pin.
5.7
Migration Paths
Figure 5-8 shows the 5-pin SOT-23 footprint of the
TC1270A, TC1270AN and TC1271A devices. Devices
that are in the 3-pin SOT-23 package could be used in
that circuit with the loss of manual Reset functionality.
Examples of compatible footprint devices in the SOT-
23-3 package are the MCP111, MCP112, TC54 and
TC51 devices. This allows the system to be designed
to offer a “base” functionality and a higher end system
with the “enhanced” functionality, which includes a
manual Reset.
FIGURE 5-8:
SOT-23 5-pin to 3-pin
Comparison.
5.8
Reset Signal Integrity During
Power-Down
The TC1270A and TC1271A Reset output is valid
down to VDD = 1.0V. Below this voltage the output
becomes an “open circuit” and does not sink current.
This means CMOS logic inputs to the microcontroller
will be floating at an undetermined voltage. Most digital
systems are completely shut down well above this volt-
age. However, in situations where the Reset signal
must be maintained valid to VDD = 0V, external circuitry
is required.
For devices where the Reset signal is active-low, a
pull-down resistor must be connected from the
TC1270A RST pin to ground to discharge stray
capacitances and hold the output low (Figure 5-9).
Similarly for devices where the Reset signal is
active-high, a pull-up resistor to VDD is required to
ensure a valid high RST signal for VDD below 1.0V
This resistor value, though not critical, should be
chosen such that it does not appreciably load the Reset
pin under normal operation (100 k
should be suitable
for most applications).
FIGURE 5-9:
Ensuring a valid active-low
Reset pin output state as VDD approaches 0V.
FIGURE 5-10:
Ensuring a valid active-high
Reset pin output state as VDD approaches 0V.
MR
VSS
VDD
RST
Reset I/O
TC1270A/71A
VDD
or
RST
Buffered
Reset to
system
4.7 k
3
2
1
SOT-23-3
1
2
3
5
4
SOT-23-5
NC
VDD
MR
RST
VSS
VDD
or
RST
or
RST
MR
VSS
VDD
RST
TC1270A
VDD
R1
100 k
MR
VSS
VDD
RST
TC1271A
VDD
R1
100 k
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