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參數(shù)資料
| 型號： | TC1271ARVCTTR |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5 |
| 封裝： | LEAD FREE, PLASTIC, SOT-23, 5 PIN |
| 文件頁數(shù)： | 17/48頁 |
| 文件大小： | 541K |
| 代理商： | TC1271ARVCTTR |
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TC1270A/70AN/71A
DS22035D-page 24
2007-2011 Microchip Technology Inc.
4.5
Reset Generator Circuit
The output signals from the voltage detect circuit and
the manual Reset with glitch filter circuit are OR’d
together and used to activate the Reset generator
module.
After the Reset conditions have been removed (the MR
pin is no longer forced low and the input voltage is
greater than the trip point voltage), the Reset generator
circuit determines the Reset delay time-out required.
There are three options for the delay circuit. These are:
2.19 ms (typical) delay
35 ms (typical) delay
280 ms (typical) delay
4.5.1
RESET DELAY TIMER
The Reset Delay Timer ensures that the TC127XA
device will “hold” the embedded system in Reset until
the system voltage has stabilized. The Reset Delay
Timer time-out is shown in Table 4-4.
The Reset Delay Timer starts when the voltage detect
circuit output AND the manual Reset with glitch filter
circuit output become inactive. While the Reset Delay
Timer is active, the RST or RST pin is driven to the
active state. When the Reset Delay Timer times out,
the RST or RST pin is driven inactive.
The Reset Delay Timer (tRST) starts after the device
voltage rises above the “actual” trip point (VTRIP).
When the Reset Delay Timer times out, the Reset out-
put pin (RST/RST) is driven inactive.
The Reset Delay Timer is cleared if either, or both, the
voltage detector circuit output and the manual Reset
with glitch filter circuit output become active. The RST
or RST pin continues to be driven to the active state.
Figure 4-12 illustrates when the Reset Delay Timer
(tRST) is active or inactive.
4.5.2
EFFECT OF TEMPERATURE ON
RESET POWER-UP TIMER (tRPU)
The
Reset
Delay
Timer
time-out
period
(tRST)
determines how long the device remains in the Reset
condition. This time out is affected by the device VDD
and the temperature. Typical responses for varying
VDD values and temperatures are presented in
Figures 2-28, 2-29 and 2-30.
TABLE 4-4:
RESET DELAY TIMER
TIME OUTS
FIGURE 4-12:
Reset Power-up Timer
Waveform.
tRST
Units
Min
Typ
Max
1.09
2.19
4.38
ms
17.5
35
70
ms
140
280
560
ms
This is the
minimum time that
the Reset Delay
Timer will “hold”
the Reset pin
active after VDD
rises above VTRIP
This is the
maximum time that
the Reset Delay
Timer will “hold”
the Reset pin
active after VDD
rises above VTRIP
Note 1:
Shaded rows are custom-ordered time
outs.
VTRIP
VDD
RST
tRST
Reset Delay
Timer Inactive
Reset
Delay
Timer
Inactive
Re
se
tDe
la
y
Ti
m
e
rA
c
ti
v
e
See Figures 2-9,
See Figures 2-9,
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TC1271ARVRCTR | 功能描述:監(jiān)控電路 4Pin uP Reset Mon 4.63V Reset Thresh RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| TC1271ASBVCTTR | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Voltage Supervisor with Manual Reset Input |
| TC1271ASBVRCTR | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Voltage Supervisor with Manual Reset Input |
| TC1271ASCVCTTR | 功能描述:監(jiān)控電路 Vltg Detector 2.93V Reset Threshold RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| TC1271ASCVRCTR | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Voltage Supervisor with Manual Reset Input |
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