參數(shù)資料
型號: TC1271ARVCTTR
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5
封裝: LEAD FREE, PLASTIC, SOT-23, 5 PIN
文件頁數(shù): 16/48頁
文件大?。?/td> 541K
代理商: TC1271ARVCTTR
2007-2011 Microchip Technology Inc.
DS22035D-page 23
TC1270A/70AN/71A
4.3
Negative-Going VDD Transients
The minimum pulse width (time) required to cause a
Reset
may
be
an
important
criteria
in
the
implementation of a Power-on Reset (POR) circuit.
This time is referred to as transient duration. The
TC127XA devices are designed to reject a level of
negative-going transients (glitches) on the power
supply line.
Transient duration is the amount of time needed for
these supervisory devices to respond to a drop in VDD.
The transient duration time (tTRAN) is dependent on the
magnitude of VTRIP – VDD (overdrive). Any combination
of duration and overdrive that lies under the duration/
overdrive curve will not generate a Reset signal.
Generally
speaking,
the
transient
duration
time
decreases with an increase in the VTRIP – VDD voltage.
Figure 4-9 shows an example transient duration vs.
Reset comparator overdrive. It shows that the farther
below the trip point the transient pulse goes, the shorter
the duration of the pulse required to cause a Reset
gets. So, any combination of duration and overdrive
that lays under the curve will not generate a Reset
signal. Combinations above the curve are detected as
a brown-out or power-down.
Transient immunity can be improved by adding a
bypass capacitor (typically 0.1 F) as close as possible
to the VDD pin of the TC127XA device.
FIGURE 4-9:
Example of Typical
Transient Duration Waveform.
4.4
Manual Reset with Glitch Filter
Circuit
The Manual Reset input pin (MR) allows the Reset pins
(RST/RST) to be manually forced to their active states.
The MR pin has circuitry to filter noise pulses that may
be present on the pin. Figure 4-10 shows a block
diagram for using the TC127XA with a push button
switch. To minimize the required external components,
the MR input has an internal pull-up resistor.
A mechanical push button or active logic signal can
drive the MR input.
Once MR has been low for a time, tMD (the manual
Reset delay time), the Reset output pins are forced
active. The Reset output pins will remain in their active
states for the Reset Delay Timer time-out period (tRST).
Figure 4-11 shows a waveform for the manual Reset
switch input and the Reset pins output.
FIGURE 4-10:
Push Button Reset.
FIGURE 4-11:
MR Input – Push Button.
4.4.1
NOISE FILTER
The noise filter filters out noise spikes (glitches) on the
Manual Reset pin (MR). Noise spikes less than 100 ns
(typical) are filtered.
Time (s)
0V
S
upp
ly
V
o
lt
a
g
e
5V
VTRIP(MIN) - VDD
tTRAN (Duration)
VTRIP(MAX)
VTRIP(MIN)
(Overdrive)
Transient Overdrive Voltage (mV)
T
ran
si
en
tD
u
rati
o
n
(ms)
Area below curve will
not generate a Reset signal
Area above curve will
generate a Reset signal
VDD
MR
VSS
RST
MCLR
+5V
TC127XA
PIC MCU
RST
VIL
tMR
RST
tMD
VIH
tRST
MR
The MR input typically ignores input pulses
of 100 ns.
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