- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄220081 > TC1271ARVCTTR 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5 PDF資料下載
參數(shù)資料
| 型號： | TC1271ARVCTTR |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5 |
| 封裝： | LEAD FREE, PLASTIC, SOT-23, 5 PIN |
| 文件頁數(shù)： | 14/48頁 |
| 文件大?。?/td> | 541K |
| 代理商： | TC1271ARVCTTR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
2007-2011 Microchip Technology Inc.
DS22035D-page 21
TC1270A/70AN/71A
Table 4-2 shows the various device trip point options
and their VTRIP(MAX) and VTRIP(MIN) voltages. The neg-
ative percentage change from common regulated
voltages is also shown.
If the VDD is falling from the regulated voltage as it
crosses the VTRIP voltage, the RST/RST pin is driven
active. Then, the desired circuitry is forced into Reset,
or the circuitry has the indication that the VDD is below
the selected VTRIP.
If the VDD is rising as it crosses the VTRIP voltage, the
RST/RST pin is driven inactive after the Reset Delay
Timer elapses. Then, the desired circuitry is released
from Reset and will start to operate in its Normal mode,
or the circuitry has the indication that the VDD is above
the selected VTRIP.
TABLE 4-2:
SELECTING THE TRIP POINT
The
TC1270A/TC1270AN/TC1271A
devices
are
optimized to reject fast transient glitches on the VDD
line. If the low input signal (which is below VTRIP) is not
rejected, the Reset output is driven active within 50 s
of VDD falling through the Reset voltage threshold.
After the device exits the Reset condition, the delay
circuitry will hold the RST/RST pin active until the
appropriate Reset delay time (tRST) has elapsed.
During device power-up, the input voltage is below the
trip point voltage. The device must enter the valid oper-
ating range for the device to start operation.
4.2.1
HYSTERESIS
There is also a minimal hysteresis (VHYS) on the trip
point. This is so that small noise signals on the device
voltage (VDD) do not cause the Reset pin (RST/RST) to
“jitter” (oscillate between active and inactive levels).
The characterization graphs shown in Figures 2-13
through 2-15 show the device hysteresis as a
percentage of the voltage trip point (VTRIP).
The Reset Delay Timer (tRST) gives a time-based
hysteresis for the system.
4.2.2
POWER-UP/RISING VDD
As the device VDD rises, the device’s Reset circuit will
remain active until the voltage rises above the “actual”
trip point (VTRIP).
Figure 4-7 shows a power-up sequence and the
waveform of the RST and RST pins. As the device
powers up, the voltage will start below the valid
operating voltage of the device. At this voltage, the
RST/RST output is not valid. Once the voltage is above
the minimum operating voltage (1V) and below the
selected VTRIP, the Reset output will be active.
Once the device voltage rises above the VTRIP voltage,
the Reset Delay Timer (tRST) starts. When the Reset
Delay Timer times out, the Reset output (RST/RST) is
driven inactive.
FIGURE 4-7:
RST/RST Pin Operation
Power-up.
Trip
Voltage
Selection
VTRIP(MAX)
(1)/
VTRIP(MIN)
(2)
- % From
Regulated Voltage
5.0V
3.3V
3.0V
L
4.75V
5.0%
—
4.50V
10.0%
—
M
4.50V
10.0%
—
4.25V
15.0%
—
T
3.15V
—
4.5%
—
3.00V
—
9.2%
—
S
3.00V
—
9.2%
—
2.85V
—
13.7%
—
R
2.70V
—
10.0%
2.55V
—
15.0%
Note 1:
Voltage regulator circuit must have tighter
tolerance (%) than VTRIP(MAX)% from
regulated voltage.
2:
Circuitry being reset must have a wider
tolerance (%) than VTRIP(MIN)% from
regulated voltage.
VTRIP
1V
VDD
tRST
(1)
RST(2)
RST
Note 1: Additional system current is consumed
during the tRST time.
2: The TC1270AN requires an external
pull-up resistor.
相關PDF資料 |
PDF描述 |
|---|---|
| TPS3808G12DBVR | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6 |
| TPS3820-50DBVTG4 | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO5 |
| TPS56221DQPT | SWITCHING CONTROLLER, PDSO22 |
| TPS62362YZHR | 4.3 A SWITCHING REGULATOR, 2500 kHz SWITCHING FREQ-MAX, BGA16 |
| TC151B3222EOA713 | 0.25 A SWITCHING REGULATOR, 50 kHz SWITCHING FREQ-MAX, PDSO8 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TC1271ARVRCTR | 功能描述:監(jiān)控電路 4Pin uP Reset Mon 4.63V Reset Thresh RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| TC1271ASBVCTTR | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Voltage Supervisor with Manual Reset Input |
| TC1271ASBVRCTR | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Voltage Supervisor with Manual Reset Input |
| TC1271ASCVCTTR | 功能描述:監(jiān)控電路 Vltg Detector 2.93V Reset Threshold RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| TC1271ASCVRCTR | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Voltage Supervisor with Manual Reset Input |
發(fā)布緊急采購，3分鐘左右您將得到回復。