
TAS5518C
8-Channel Digital Audio PWM Processor
www.ti.com
SLES238A – SEPTEMBER 2008 – REVISED JULY 2009
List of Tables
2-1
Serial Data Formats
..............................................................................................................
182-2
TAS5518C Audio-Processing Feature Sets
...................................................................................
202-3
Contents of One 20-Byte Biquad Filter Register (Default = All-Pass)
......................................................
282-4
Bass and Treble Filter Selections
...............................................................................................
292-5
Linear Gain Step Size
............................................................................................................
292-6
Default Loudness Compensation Parameters
.................................................................................
312-7
Example Loudness Function Parameters
......................................................................................
322-8
DRC Recommended Changes From TAS5518C Defaults
..................................................................
333-1
Device Outputs During Reset
...................................................................................................
423-2
Values Set During Reset
.........................................................................................................
433-3
Device Outputs During Power Down
...........................................................................................
443-4
Device Outputs During Back-End Error
........................................................................................
453-5
Description of the Channel Configuration Registers (0x05 to 0x0C)
.......................................................
463-6
Recommended TAS5518C Configurations for Texas Instruments Power Stages
.......................................
473-7
Audio System Configuration (General Control Register 0xE0)
..............................................................
473-8
Volume Ramp Periods in ms
....................................................................................................
487-1
Clock Control Register Format
..................................................................................................
717-2
General Status Register Format
................................................................................................
717-3
Error Status Register (0x02)
.....................................................................................................
717-4
System Control Register-1 Format
.............................................................................................
727-5
System Control Register-2 Format
.............................................................................................
727-6
Channel Configuration Control Register Format
..............................................................................
727-7
Headphone Configuration Control Register Format
..........................................................................
747-8
Serial Data Interface Control Register Format
................................................................................
747-9
Soft Mute Register Format
.......................................................................................................
757-10
Automute Control Register Format
.............................................................................................
767-11
Automute PWM Threshold and Back-End Reset Period Register Format
................................................
777-12
Modulation Index Limit Register Format
.......................................................................................
787-13
Bank-Switching Command Register Format
...................................................................................
787-14
Channel 1–8 Input Mixer Register Format
.....................................................................................
807-15
Bass Management Register Format
............................................................................................
837-16
Biquad Filter Register Format
...................................................................................................
837-17
Contents of One 20-Byte Biquad Filter Register (Default = All-Pass)
......................................................
847-18
Channel 1–8 Bass and Treble Bypass Register Format
.....................................................................
847-19
Loudness Register Format
.......................................................................................................
847-20
Channel 1–7 DCR1 Control Register Format
.................................................................................
857-21
Channel-8 DRC2 Control Register Format
....................................................................................
867-22
DRC1 Data Register Format
.....................................................................................................
867-23
DRC2 Data Register Format
.....................................................................................................
87List of Tables
7