參數(shù)資料
型號(hào): TAS5518CPAGR
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: GREEN, PLASTIC, TQFP-64
文件頁數(shù): 41/103頁
文件大小: 2007K
代理商: TAS5518CPAGR
3
TAS5518C Controls and Status
3.1
I
2C Status Registers
3.1.1
General Status Register (0x01)
3.1.2
Error Status Register (0x02)
3.2
TAS5518C Pin Controls
3.2.1
Reset (RESET)
TAS5518C
8-Channel Digital Audio PWM Processor
SLES238A – SEPTEMBER 2008 – REVISED JULY 2009
www.ti.com
The TAS5518C provides control and status information from both the I2C registers and device pins.
This section describes some of these controls and status functions. The I2C summary and detailed
register descriptions are contained in Section 6 and Section 7.
The TAS5518C has two status registers that provide general device information. These are the general
status register 0 (0x01) and the error status register (0x02).
Device identification code
Clip indicator – The TAS5518C has a clipping indicator. Writing to the register clears the indicator.
No internal errors (the valid signal is high)
A clock error has occurred – These are sticky bits that are cleared by writing to the register.
LRCLK error – when the number of MCLKs per LRCLK is incorrect
SCLK error – when the number of SCLKS per LRCLK is incorrect
Frame slip – when the number of MCLKs per LRCLK changes by more than 10 MCLK cycles
PLL phase-lock error
This error status register is normally used for system development only.
The TAS5518C provide a number of terminal controls to manage the device operation. These controls
are:
RESET
PDN
BKND_ERR
HP_SEL
MUTE
The TAS5518C is placed in the reset mode either by the power-up reset circuitry when power is applied,
or by setting the RESET terminal low.
RESET is an asynchronous control signal that restores the TAS5518C to the hard-mute state (M-state).
Master volume is immediately set to full attenuation (there is no ramp down). Reset initiates the device
reset without an MCLK input. As long as the RESET terminal is held low, the device is in the reset state.
During reset, all I2C and serial data bus operations are ignored.
Table 3-1 shows the device output signals while RESET is active.
Table 3-1. Device Outputs During Reset
SIGNAL
SIGNAL STATE
Valid
Low
PWM P-outputs
Low (M-state)
PWM M-outputs
Low (M-state)
SDA
Signal input (not driven)
TAS5518C Controls and Status
42
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