參數(shù)資料
型號(hào): TAS5518CPAG
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: GREEN, PLASTIC, TQFP-64
文件頁數(shù): 74/103頁
文件大小: 2007K
代理商: TAS5518CPAG
7.4
System Control Register 1 (0x03)
7.5
System Control Register 2 (0x04)
7.6
Channel Configuration Control Registers (0x05–0x0C)
TAS5518C
8-Channel Digital Audio PWM Processor
SLES238A – SEPTEMBER 2008 – REVISED JULY 2009
www.ti.com
Table 7-3. Error Status Register (0x02) (continued)
D7
D6
D5
D4
D3
D2
D1
D0
FUNCTION
0
No errors
Bits D6, D5, D2, D1, and D0 are don't care.
Table 7-4. System Control Register-1 Format
D7
D6
D5
D4
D3
D2
D1
D0
Function
0
PWM high pass disabled
1
PWM high pass enabled
0
Soft unmute on recovery from clock error
1
Hard unmute on recovery from clock error
1
PSVC Hi-Z enabled
0
PSVC Hi-Z disabled
Bits D3 and D2 are don't care.
Table 7-5. System Control Register-2 Format
D7
D6
D5
D4
D3
D2
D1
D0
Function
0
Reserved
0
PWM output automute detection enabled
1
PWM output automute detection disabled
0
8-channel device input detection automute enabled
1
8-channel device input detection automute disabled
0
Unmute threshold 6 dB over input threshold
1
Unmute threshold equal to input threshold
0
No de-emphasis
0
1
De-emphasis for fS = 32 kHz
1
0
De-emphasis for fS = 44.1 kHz
1
De-emphasis for fS = 48 kHz
Channels 1, 2, 3, 4, 5, 6, 7, and 8 are mapped into 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, and 0x0C,
respectively.
Table 7-6. Channel Configuration Control Register Format
D7
D6
D5
D4
D3
D2
D1
D0
FUNCTION
0
Disable back-end reset sequence for a channel.
1
Enable back-end reset sequence for a channel.
0
Valid does not have to be low for this channel to be reset.
1
Valid must be low for this channel to be reset.
0
Valid does not have to be low for this channel to be muted.
1
Valid must be low for this channel to be muted.
0
Normal BEPolarity
1
Switches PWM+ and PWM– and inverts audio signal
Serial-Control Interface Register Definitions
72
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