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參數(shù)資料
| 型號(hào)： | T35L6464A |
| 廠商： | TM Technology, Inc. |
| 英文描述： | 64K x 64 SRAM |
| 中文描述： | 64K的× 64的SRAM |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 160K |
| 代理商： | T35L6464A |
TE
CH
tm
AC TEST CONDITIONS
T35L6464A
Taiwan Memory Technology, Inc. reserves the right
P. 10
to change products or specifications without notice.
Publication Date: AUG. 1998
Revision: E
Input pulse levels
Input rise and fall times
Input timing reference
levels
Output reference levels
Output load
0V to 3.0V
1.5ns
1.5V
1.5V
See Figures 1 and 2
Notes:
1. All voltages referenced to Vss (GND).
2. Overshoot:
V
IH
≤
+3.6 V for t
≤
tKC/2
Undershoot: V
IL
≥
-1.0 V for t
≤
tKC/2
3. Icc is given with no output current. Icc increases
with greater output loading and faster cycle
times.
4. This parameter is sampled.
5. Test conditions as specified with the output
loading as shown in Fig. 1 unless otherwise
noted.
6. Output loading is specified with C
L
=5 pF as in
Fig.2.
7. At any given temperature and voltage condition,
tKQHZ is less than tKQLZ and tOEHZ is less
than tOELZ.
OUTPUT LOADS
8. A Write cycle is defined by at least one byte
write enable LOW and
ADSP
HIGH for the
required setup and hold times. A Read cycle
is defined by all byte write enables HIGH and
(
ADSC
or
ADV
LOW) or
ADSP
LOW for
the required setup and hold times.
9.
OE
is a "don't care" when a byte write enable is
sampled LOW.
10.This is a synchronous device. All synchronous
inputs must meet the setup and hold times,
except for “don‘t care” as defined in the truth
table.
11.AC I/O curves are available upon request.
12."Device Deselected means the device is in
POWER-DOWN mode as defined in the truth
table. "Device Selected" means the device is
active.(not in POWER-DOWN mode).
13.Typical values are measured at 3.3V 25
°
C and
20ns cycle time.
14.MODE pin has an internal pull-up and exhibits
an
input leakage current of
±
10
μ
A.
DQ
DQ
Fig.1 OUTPUT LOAD EQUIVALENT
Fig.2 OUTPUT LOAD EQUIVALENT
Z
0
= 50
50
30 pF
Vt =1.5V
3.3V
317
351
5 pF
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