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參數(shù)資料
| 型號(hào)： | T35L6464A-5Q |
| 廠商： | TM Technology, Inc. |
| 英文描述： | 64K x 64 SRAM |
| 中文描述： | 64K的× 64的SRAM |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 160K |
| 代理商： | T35L6464A-5Q |
TE
CH
tm
AC ELECTRICAL CHARACTERISTICS
(Note 5) (0
°
C
≤
T
A
≤
70
°
C; Vcc = + 3.3V +10%/-5%)
T35L6464A
Taiwan Memory Technology, Inc. reserves the right
P. 9
to change products or specifications without notice.
Publication Date: AUG. 1998
Revision: E
DESCRIPTION
Clock
Clock cycle time
Clock HIGH time
Clock LOW time
Output Times
Clock to output valid
Clock to output invalid
Clock to output in Low-Z tKQLZ
Clock to output in High-Z tKQHZ
OE to output valid
OE to output in Low-Z
OE to output in High-Z
Setup Times
Address
Address Status
(
ADSC
,
ADSP
)
Address Advance (
ADV
) tAAS
Byte Write Enables
(BW1~
BW8
,
BWE
,
GW
)
Data-in
Chip Enables (
CE
,
CE2
,CE2,
CE3
,CE3)
Hold Times
Address
Address Status
(
ADSC
,
ADSP
)
Address Advance (
ADV
) tAAH
Byte Write Enables
(BW1~
BW8
,
BWE
,
GW
)
Data-in
Chip Enables (
CE
,
CE2
,CE2,
CE3
,CE3)
-5
-6
-7
-8
SYM. MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES
tKC
10
12
15
tKH
4
4.5
5
tKL
4
4.5
5
tKQ
5
6
tKQX
2
2
2
4
5
5
5
5
tOEQ
5
5
tOELZ
0
0
0
tOEHZ
4
5
tAS
3
3
3
tADSS
3
3
3
20
6
6
2
5
0
3
3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7
6
5
6
8
6
6
6
6,7
6,7
9
6,7
6,7
8,10
8,10
3
3
3
3
3
3
3
3
ns
ns
8,10
8,10
tWS
tDS
tCES
3
3
3
3
3
3
3
3
ns
ns
8,10
8,10
tAH
tADSH
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
ns
ns
8,10
8,10
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
ns
ns
8,10
8,10
tWH
tDH
tCEH
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
ns
ns
8,10
8,10
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