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參數(shù)資料
| 型號： | T35L6464A-5Q |
| 廠商： | TM Technology, Inc. |
| 英文描述： | 64K x 64 SRAM |
| 中文描述： | 64K的× 64的SRAM |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 160K |
| 代理商： | T35L6464A-5Q |
TE
CH
tm
SNOOZE MODE
T35L6464A
Taiwan Memory Technology, Inc. reserves the right
P. 11
to change products or specifications without notice.
Publication Date: AUG. 1998
Revision: E
down” mode in which the device is deselected and
the current is reduced to I
ZZ.
The duration of
SNOOZE MODE is dictated by the length of time
the ZZ pin is in a HIGH state. After entering
SNOOZE MODE, the clock and all other inputs
are ignored.
The ZZ pin (pin 63) is an asynchronous ,
SNOOZE MODE ELECTRICAL CHARACTERISTICS
SNOOZE MODE is a low current, “power
active HIGH input that causes the device to enter
SNOOZE MODE. When the ZZ pin becomes a
logic HIGH, I
ZZ
is guaranteed after the setup time
t
ZZ is met. Any access pending when entering
SNOOZE MODE is not guaranteed to successfully
complete. Therefore, SNOOZE MODE must not
be initiated until valid pending operations are
completed.
DESCRIPTION
Current during
SNOOZE MODE
ZZ HIGH to
SNOOZE MODE time
SNOOZE MODE
Operation Recovery Time
SNOOZE MODE WAVEFORM
CONDITIONS
SYMBOL
MIN
MAX
UNITS
NOTES
ZZ
≥
V
IH
I
ZZ
10
mA
tZZ
2(tKC)
ns
3
tRZZ
2(tKC)
ns
3
C L K
Z Z
tRZZ
tZZ
IZZ
ISUPPL Y
DON'T CARE
C E
I
SUPPLY
Note:
1. The
CE
signal shown above refers to a TRUE state on all chip selects for the device.
2. All other inputs held to static CMOS levels (V
IN
≤
Vss + 0.2 V or
≥
Vcc -0.2 V).
3. This parameter is sampled.
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