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參數(shù)資料
| 型號： | STW81100 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | MULTI-BAND RF FREQUENCY SYNTHESIZER WITH INTEGRATED VCOS |
| 中文描述： | 多波段射頻頻率合成器帶有集成的VCO |
| 文件頁數(shù)： | 10/23頁 |
| 文件大小： | 915K |
| 代理商： | STW81100 |
STW81100
10/23
6
The block diagram of Figure 2 shows the different blocks, which have been integrated to achieve an inte-
ger-N PLL frequency synthesizer.
The STW81100 consists of 2 internal low-noise VCOs with buffer blocks, a divider by 2, a divider by 4, a
low-noise PFD (Phase Frequency Detector), a precise charge pump, a 9-bit programmable reference di-
vider, two programmable counters and a dual-modulus prescaler.
The A-counter (6 bits) and B counter (9 bits) counters, in conjunction with the dual modulus prescaler P/
P+1 (64/65), implement an N integer divider, where N = B*P +A.
The division ratio of both reference and VCO dividers is controlled through an I
2
C bus interface.
All devices operate with a power supply of 3.3 V and can be powered down when not in use.
General Description
7
Circuit Description
7.1 Reference input stage
The reference input stage is shown in Figure 12. The resistor network feeds a DC bias at the Fref input
while the inverter used as the frequency reference buffer is AC coupled.
Figure 12. Reference Frequency Input Buffer
7.2 Reference Divider
The 9-bit programmable reference counter allows the input reference frequency to be divided to produce
the input clock to the PFD. The division ratio is programmed through the I
2
C bus interface.
7.3 Prescaler
The dual-modulus prescaler 64/65 takes the CML clock from the VCO buffer and divides it down to a man-
ageable frequency for the CMOS A and B counters. It is based on a synchronous 4/5 core which division
ratio depends on the state of the modulus input.
7.4 A and B Counters
The A (6 bits) and B (9 bits) counters, in conjunction with the dual modulus prescaler make it possible to
generate output frequencies which are spaced only by the reference frequency divided by the reference
division ratio. Thus, the division ratio and the VCO output frequency are given by these formulas:
N = B x P + A
F
VCO
-----------------------------------------
=
INV
BUF
VDD
Fref
Power Down
B P
A
+
(
)
F
R
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STW81100_1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:MULTI-BAND RF FREQUENCY SYNTHESIZER WITH INTEGRATED VCOs |
| STW81100AT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:MULTI-BAND RF FREQUENCY SYNTHESIZER WITH INTEGRATED VCOS |
| STW81100AT-1 | 功能描述:鎖相環(huán) - PLL MULTI BAND RF FREQ SYNTHESIZER RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| STW81100ATR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:MULTI-BAND RF FREQUENCY SYNTHESIZER WITH INTEGRATED VCOS |
| STW81100ATR-1 | 功能描述:鎖相環(huán) - PLL MULTI BAND RF FREQ SYNTHESIZER RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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