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參數(shù)資料
| 型號： | STV2001 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | I2C SINGLE FREQUENCY DEFLECTION PROCESSOR AND 120 MHz RGB PREAMPLIFIER |
| 中文描述： | 撓度的I2C單頻處理器和120兆赫的RGB前置放大器 |
| 文件頁數(shù)： | 28/46頁 |
| 文件大小： | 528K |
| 代理商： | STV2001 |
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STV2001
28/
46
14.2.5 - X-RAY Protection
X-Ray protection is activated when the ABL input (1 V on Pin 20) is at a low level. It inhibits both H-Drive,
and Vout while Video goes into off-mode.
This activation is internally delayed by 2 lines to avoid erratic detection (short parasitics).
This protection is latched; it may be reset either by switching V
CC
off or by I
2
C (see
Figure 13
).
Figure 13. Safety Functions Block Diagram
14.3 - VERTICAL PART
14.3.1 - Function
When the synchronization pulse is not present, an
internal current source sets the free running fre-
quency. For an external capacitor, C
OSC
= 150nF,
the typical free running frequency is 100Hz.
The typical free running frequency can be calculat-
ed according to:
fo(Hz) = 1.5
.
10
-5 .
COSC
A positive TTL level pulse applied on Pin 2 (Vin) is
used to synchronize the ramp in the range [fmin,
fmax] (see
Figure 14
). This frequency range de-
pends on the external capacitor connected on
Pin 6 (VCAP). A 150nF (
±
5%) capacitor is recom-
mended for 50 Hz to 165 Hz applications.
The typical maximum and minimum frequency, at
25
o
C and without any correction (S correction),
can be calculated as follows:
f(Max.) = 3.5 x f
o
and f(Min.) = 0.33 x f
o
When an S correction is applied, these values are
slightly modified.
With a synchronization pulse, the internal oscilla-
tor is synchonized immediately but its amplitude
changes. An internal correction then adjusts it in
less than half a second. The ramp top value (Pin 6)
is sampled on the AGC capacitor (Pin 4) at each
clock pulse. A transconductance amplifier modi-
fies the charge current of the capacitor so as to
make the amplitude constant again. We recom-
mend using an AGC capacitor with a low leakage
current. A value lower than 100nA is mandatory.
A good level of stability for the internal closed loop
is obtained by a 470nF
±
5% capacitor value on
Pin 4 (VAGC).
VRB (Pin 8) is used for decoupling the internal 2V
reference voltage by a capacitor.
14.3.2 - I
2
C Control Adjustments
S correction shapes can then be added to this
ramp. This frequency-independent S correction is
generated internally. Its amplitudes is adjustable
via the I
2
C. S correction can be inhibited by apply-
ing the selected bits.
Finally, the amplitude of the S corrected ramp is
adjustable via the vertical ramp amplitude control
register.The adjusted ramp is available on Pin 7
(V
OUT
) to drive an external power stage.
HORIZONTAL
OUTPUT
INHIBITION
VERTICAL
OUTPUT
INHIBITION
S
R
Q
Horizontal Flyback
0.7V
XRAY Protection
V
CC
Checking
V
CC
V
CC
off or I
2
C Reset
VSCinh
I
2
C Drive on/off
I
2
C Ramp on/off
+
20
ABL
+1V
Video-off
1
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