參數(shù)資料
型號(hào)： STV0056A
廠商： 意法半導(dǎo)體
英文描述： Satellite Sound and Video Processor(衛(wèi)星探測(cè)和視頻處理器)
中文描述： 衛(wèi)星聲音和視頻處理器（衛(wèi)星探測(cè)和視頻處理器）
文件頁(yè)數(shù)： 5/26頁(yè)
文件大?。?/td> 247K
代理商： STV0056A
VIDEO PROCESSING
B-BAND IN
AC-coupled video input from a tuner.
Z
IN
> 10k
±
25%. This drives an on-chip video
amplifier. The other input of this amp is AC
grounded by being connectedto an internalV
REF
.
The video amplifier has selectable gain from 0dB
to 12.7dB in 63 stepsand its output signal can be
selectednormal or inverted.
UNCL DEEM
Deemphasizedstillunclamped output. It isalso an
input of thevideo matrix.
VIDEEM1
Connected to an external de-emphasis network
(forinstance 625 lines PAL de-emphasis).
VIDEEM2 / 22kHz
Connected to an external de-emphasis network
(forinstance525lines NTSC orothervideode-em-
phasis). Alternativelya precise22kHztonemay be
output by I
2
C bus control.
CLAMP IN
This pin clamps the most negativeextreme of the
input (the sync tips) to 2.7V
DC
(or appropriatevolt-
age). The video at the clamp input is only 1V
PP
.
This clamped video which is de-emphasised, fil-
tered and clamped (energy dispersal removed) is
normal, negative syncs, video. This signal drives
the VideoMatrix input called Normal Video.
It has aweak(1.0
μ
A
±
15 %)stable current source
pullingthe inputtowardsGND. Otherwisethe input
impedance is very high at DC to 1kHz Z
IN
> 2M
.
Video bandwidth through this is -1dB at 5.5MHz.
The CLAMPinput DCrestore voltageis then used
as a means for getting the correct DC voltage on
the SCART outputs.
S3 VIDRTN
This input can be driven for instance by the de-
coder.This inputhas a DC restorationclamp on its
input. The clamp sink current is 1
μ
A
±
15% withthe
buffer Z
IN
> 1M
.
S2 VIDRTN, S1 VIDRTN
Externalvideoinput1.0V
pp
ACcoupled75
source
impedance.This input has a DC restorationclamp
on its input. The clamp sink current is 1
μ
A
±
15%
with thebufferZ
IN
> 1M
. Thissignal is an inputto
the VideoMatrix.
S1 VIDOUT, S2 VID OUT
Video drivers for SCART 1 and SCART 2. An
external emitter followerbuffer is required to drive
a 150
load. The average DC voltage to be 1.5V
on theO/P. The signalis video2.0V
PP
5.5MHzBW
with sync tip = 1.2V. These pins get signals from
the Video Matrix. The signal selected from the
Video Matrix for output on thispin is controlled by
a control register. This output also feature a high
impedancemode for parallel connection.
S3 VID OUT
This output can drive for instancea decoder.Also
it is able to pass 10MHz ; Z
OUT
< 75
. Video on
this pin will be 2V
PP
. The black level of the ouput
video signal can be adjustedthrough I
2
C bus con-
trol to easily interface with on-board Videocrypt
decoder. This output feature an high impedance
mode for parallelconnection.
V 12V
+ 12Vdoublebonded:ESD+guardringsandvideo
circuit power.
V GND
Doubledbonded.Clean VID IN GND. Strategically
placed video power ground connection to reduce
video currents getting into the rest of the circuit.
CONTROL BLOCK
GND 5V
The main power ground connectionfor the control
logic, registers, the I
2
C bus interface, synthesizer
& watchdogand XTLOSC.
V
DD
5V
Digital +5V power supply.
SCL
ThisistheI
2
C busclockline.Clock= DC to100kHz.
Requiresexternal pull up eg.10k
to 5V.
SDA
This is theI
2
C bus data line.Requires external pull
up eg. 10k
to 5V.
I/O / 22kHz
Generalpurpose input outputpin or 22kHz output.
XTL
This pinallowsforthe on-chiposcillator tobe either
used with a crystal to ground of 4MHz or 8MHz, or
to be driven by an external clock source. The
external source can be either 4MHz or 8MHz. A
programmablebit inthe controlblock removesa
÷
2
blockwhen the 4MHz option is selected.
HA
Hardwareaddress with internal135
μ
A pull down.
Chip address is 06 when this pin is grouded and
chip addressis 46 when connected to V
DD
.
PIN DESCRIPTION
(continued)
STV0056A
5/26
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