參數(shù)資料
型號(hào)： STPCI2HDYC
廠商： STMICROELECTRONICS
元件分類： 外設(shè)及接口
英文描述： MULTIFUNCTION PERIPHERAL, PBGA516
封裝： PLASTIC, BGA-516
文件頁數(shù)： 84/109頁
文件大小： 2430K
代理商： STPCI2HDYC
STPC ATLAS
76/109
Issue 1.1 - March 23, 2004
6.2. STPC CONFIGURATION
The STPC is a very flexible product thanks to
decoupled clock domains and to strap options
enabling a user-optimized configuration.
As some trade off are often necessary, it is
important to do an analysis of the application
needs prior to design a system based on this
product. The applicative constraints are usually
the following:
- CPU performance
- graphics / video performances
- power consumption
- PCI bandwidth
- booting time
- EMC
Some other elements can help to tune the choice:
- Code size of CPU Consuming tasks
- Data size and location
On the STPC side, the configurable parameters
are the following:
- Synchronous / asynchronous mode
- HCLK speed
- MCLK speed
- Local Bus / ISA bus
6.2.1. LOCAL BUS / ISA BUS
The selection between the ISA bus and the Local
Bus is relatively simple. The first one is a standard
bus but slow. The Local Bus is fast and
programmable but doesn't support any DMA nor
external master mechanisms. The Table 6-1
below summarize the selection:
Before implementing a function requiring DMA
capability on the ISA bus, it is recommended to
check if it exists on PCI, or if it can be
implemented differently, in order to use the local
bus mode.
6.2.2. CLOCK CONFIGURATION
The CPU clock and the memory clock are
independent unless the "synchronous mode"
strap option is set (see the STRAP OPTIONS
chapter). The potential clock configurations are
The
advantage
of
the
synchronous
mode
compared to the asynchronous mode is a lower
latency when accessing SDRAM from the CPU or
the PCI (saves 4 MCLK cycles for the first access
of the burst). For the same CPU to Memory
transfer performance, MCLK has to be roughly
higher by 20MHz between SYNC and ASYNC
modes to get the same system performance level
(example: 66MHz SYNC = 86MHz ASYNC) .
In all cases, use SDRAM with CAS Latency
equals to 2 (CL2) for the best performances.
The advantage of the asynchronous mode is the
capability to reprogram the MCLK speed on the
fly. This could help for applications where power
consumption must be optimized.
The last, and more complex, information to
consider is the behaviour of the software. In case
high CPU or FPU computation is needed, it is
sometime better to be in DX2-133/MCLK=66
synchronous
mode
than
DX2-133/MCLK=90
asynchronous mode. This depends on the locality
of the number crunching code and the amount of
data manipulated.
The Table 6-3 below gives some examples. The
right column correspond to the configuration
number as described in Table 6-2 :
Obviously, the values for HCLK or MCLK can be
reduced compared to Table 6-2 in case there is no
need to push the device at its limits, or when
avoiding to use specific frequency ranges (FM
radio band for example).
6.3. ARCHITECTURE RECOMMENDATIONS
This
section
describes
the
recommend
implementations for the STPC interfaces. For
more
details,
download
the
Reference
Schematics from the STPC web site.
Table 6-1. Bus mode selection
Need
Selection
Legacy I/O device (Floppy, ...), Super I/O
ISA Bus
DMA capability (Soundblaster)
ISA Bus
Flash, SRAM, basic I/O device
Local Bus
Fast boot
Local Bus
Boot flash of 4MB or more
Local Bus
Programmable Chip Select
Local Bus
Table 6-2. Main STPC modes
CMode
HCLK
MHz
CPU clock
clock ratio
MCLK
MHz
1
Synchronous
66
133 (x2)
66
2
Asynchronous
66
133 (x2)
90
Table 6-3. Clock mode selection
Constraints
C
Need CPU power
Critical code fits into L1 cache
1
Need CPU power
Code or data does not fit into L1 cache
3
Need flexible SDRAM speed
2
相關(guān)PDF資料
PDF描述
STPIC6C595M 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16
STR710RZT6 32-BIT, FLASH, 66 MHz, RISC MICROCONTROLLER, PQFP144
STUF32864EHLFT SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96
STV3208CV 9-BIT, DSP-FAST COSINE TRANSFRM PROCESSOR, PQFP44
STVA16857AGLF SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
STPCI2HEYC 功能描述:微處理器 - MPU 133MHz x86 SoC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
STPCI2HEYI 功能描述:微處理器 - MPU 133MHz x86 SoC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
STPCINDUSTRIAL 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:PC Compatible Embedded Microprocessor
STP-CN04 功能描述:烙鐵 Cartridge Conical 0.4mm (0.016in) RoHS:否 制造商:Weller 產(chǎn)品:Soldering Stations 類型:Digital, Iron, Stand, Cleaner 瓦特:50 W 最大溫度:+ 850 F 電纜類型:US Cord Included
STP-CN05 功能描述:烙鐵 Cartridge Conical 0.5mm (0.02in) RoHS:否 制造商:Weller 產(chǎn)品:Soldering Stations 類型:Digital, Iron, Stand, Cleaner 瓦特:50 W 最大溫度:+ 850 F 電纜類型:US Cord Included
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*