參數(shù)資料
型號(hào)： STM8L162R8T6
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQFP64
封裝： 10 X 10 MM, LQFP-64
文件頁數(shù)： 12/116頁
文件大小： 1229K
代理商： STM8L162R8T6
STM8L162R8, STM8L162M8
Electrical parameters
Doc ID 17959 Rev 1
103/110
Absolute maximum ratings (electrical sensitivity)
Based on two different tests (ESD and LU) using specific measurement methods, the
product is stressed in order to determine its performance in terms of electrical sensitivity.
For more details, refer to the application note AN1181.
Electrostatic discharge (ESD)
Electrostatic discharges (a positive then a negative pulse separated by 1 second) are
applied to the pins of each sample according to each pin combination. The sample size
depends on the number of supply pins in the device (3 parts*(n+1) supply pin). Two models
can be simulated: human body model and charge device model. This test conforms to the
JESD22-A114A/A115A standard.
Static latch-up
●
LU: 3 complementary static tests are required on 10 parts to assess the latch-up
performance. A supply overvoltage (applied to each power supply pin) and a current
injection (applied to each input, output and configurable I/O pin) are performed on each
sample. This test conforms to the EIA/JESD 78 IC latch-up standard. For more details,
refer to the application note AN1181.
Table 56.
EMI data (1)
1.
Not tested in production.
Symbol
Parameter
Conditions
Monitored
frequency band
Max vs.
Unit
16 MHz
SEMI
Peak level
VDD = 3.6 V,
TA = +25 °C,
LQFP32
conforming to
IEC61967-2
0.1 MHz to 30 MHz
TBD
dB
μV
30 MHz to 130 MHz
TBD
130 MHz to 1 GHz
TBD
SAE EMI Level
TBD
-
Table 57.
ESD absolute maximum ratings
Symbol
Ratings
Conditions
Maximum
value (1)
1.
Data based on characterization results, not tested in production.
Unit
VESD(HBM)
Electrostatic discharge voltage
(human body model)
TA = +25 °C
TBD
V
VESD(CDM)
Electrostatic discharge voltage
(charge device model)
TBD
Table 58.
Electrical sensitivities
Symbol
Parameter
Class
LU
Static latch-up class
II
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