參數(shù)資料
型號(hào)： STM8AH5199TAU
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP64
封裝： 10 X 10 MM, ROHS COMPLIANT, LQFP-64
文件頁(yè)數(shù)： 65/112頁(yè)
文件大?。?/td> 2161K
代理商： STM8AH5199TAU
Memory map
STM8AF61xx, STM8AH61xx, STM8AF51xx, STM8AH51xx
Doc ID 14395 Rev 5
9.9.3
Universal synchronous/asynchronous receiver transmitter (USART)
9.9.4
Universal asynchronous receiver/transmitter with LIN support
(LINUART)
Table 29.
USART register map
Address
Register name
7
6
5
4
3
2
1
0
00 5230h
USART_SR
Reset value
TXE
1
TC
1
RXNE
0
IDLE
0
OR
0
NF
0
FE
0
PE
0
00 5231h
USART_DR
Reset value
DR7
x
DR6
x
DR5
x
DR4
x
DR3
x
DR2
x
DR1
x
DR0
x
00 5232h
USART_BRR1
Reset value
USART_DIV[11:4]
00000000
00 5233h
USART_BRR2
Reset value
USART_DIV[15:12]
0000
USART_DIV[3:0]
0000
00 5234h
USART_CR1
Reset value
R8
0
T8
0
USARTD
0
M
0
-
0
PCEN
0
PS
0
PIEN
0
00 5235h
USART_CR2
Reset value
TIEN
0
TCIEN
0
RIEN
0
ILIEN
0
TEN
0
REN
0
RWU
0
SBK
0
00 5236h
USART_CR3
Reset value
-
0
LINEN
0
STOP
00
CKEN
0
CPOL
0
CPHA
0
LBCL
0
00 5237h
USART_CR4
Reset value
-
0
LBDIEN
0
LBDL
0
LBDF
0
-
0
-
0
-
0
-
0
Table 30.
LINUART register map and reset value
Address
Register name
7
6
5
4
3
2
1
0
00 5240h
LINUART_SR
Reset value
TXE
1
TC
1
RXNE
0
IDLE
0
OR/LHE
0
NF
0
FE
0
PE
0
005241h
LINUART_DR
Reset value
DR7
0
DR6
0
DR5
0
DR4
0
DR3
0
DR2
0
DR1
0
DR0
0
00 5242h
LINUART_BRR1
Reset value
LDIV[11:8]
00000000
00 5243h
LINUART_BRR2
Reset value
LDIV[15:12]
0000
LDIV[3:0]
0000
00 5244h
LINUART_CR1
Reset value
R8
0
T8
0
UARTD
0
M
0
WAKE
0
PCEN
0
PS
0
PIEN
0
00 5245h
LINUART_CR2
Reset value
TIEN
0
TCIEN
0
RIEN
0
ILIEN
0
TEN
0
REN
0
RWU
0
SBK
0
00 5246h
LINUART_CR3
Reset value
-
0
LINEN
0
STOP
00
-
0
-
0
-
0
-
0
00 5247h
LINUART_CR4
Reset value
-
0
LBDIEN
0
LBDL
0
LBDF
0
ADD[3:0]
0000
相關(guān)PDF資料
PDF描述
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