參數(shù)資料
型號: ST95010WB3TR
廠商: 意法半導體
元件分類: DRAM
英文描述: 4K/2K/1K Serial SPI EEPROM with Positive Clock Strobe
中文描述: 4K/2K/1K串行SPI EEPROM,帶有正時鐘選通
文件頁數(shù): 10/18頁
文件大?。?/td> 110K
代理商: ST95010WB3TR
DATA PROTECTION AND PROTOCOLSAFETY
– All inputsare protectedagainstnoise,see Table
6.
– Non validS and HOLD transitionsare not taken
into account.
– S must come high at the proper clock count in
order to start a non-volatile write cycle (in the
memory array or in the status register), that is
theChipSelectSmustriseduringtheclockpulse
following the introductionof a multiple of 8 bits.
– Accessto the memory array during non-volatile
programmingcycleis ignored;however,the pro-
gramming cycle continues.
– Afteranyof theoperationsWREN,WRDI,RDSR
is completed, the chip enters a wait state and
waits for a deselect.
– The write enablelatch is reset upon power-up.
– Thewriteenablelatchis resetwhenWisbrought
low.
INITIAL DELIVERY STATE
Thedevice is deliveredwith the memoryarray in a
fully erased state (all data set at all ”1’s” or FFh).
The block protect bits are initializedto 00.
AI01446
MASTER
ST95xxx
D
Q
C
C
Q
D
S
ST95xxx
C
Q
D
S
ST95xxx
C
Q
D
S
CS3
CS2
CS1
Figure 12. EEPROMand SPI Bus
10/18
ST95040, ST95020, ST95010
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