- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98147 > ST92T141K4M6 (STMICROELECTRONICS) 16-BIT, OTPROM, 25 MHz, MICROCONTROLLER, PDSO34 PDF資料下載
參數(shù)資料
| 型號： | ST92T141K4M6 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, OTPROM, 25 MHz, MICROCONTROLLER, PDSO34 |
| 封裝： | PLASTIC, SO-34 |
| 文件頁數(shù)： | 9/179頁 |
| 文件大小： | 1905K |
| 代理商： | ST92T141K4M6 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當(dāng)前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁
106/179
ST92141 - EXTENDED FUNCTION TIMER (EFT)
EXTENDED FUNCTION TIMER (Cont’d)
7.3.4 Interrupt Management
The interrupts of the Extended Function Timer are
mapped on the eight external interrupt channels of
the microcontroller (refer to the “Interrupts” chap-
ter).
Depending on device specification, one of the fol-
lowing configurations can occur:
– The three interrupt sources are mapped on three
different interrupt channels (to use this feature,
the EFTIS bit must be reset)
– The three interrupt sources are mapped on the
same interrupt channel (to use this feature, the
EFTIS bit must be set)
Each External Interrupt Channel has:
– A trigger control bit in the EITR register (R242 -
Page 0)
– A pending bit in the EIPR register (R243 -
Page 0)
– A mask bit in the EIMR register (R244 - Page 0)
Program the interrupt priority level using the
EIPLR register (R245 - Page 0). For a description
of these registers refer to the “Interrupts” and
“DMA” chapters.
Use of three interrupt channels
To use the interrupt features, for each interrupt
channel used, perform the following sequence:
– Set the priority level of the interrupt channel(s)
used for the Extended Function Timer (EIPRL
register)
– Select the interrupt trigger edge(s) as rising edge
(set the corresponding bit(s) in the EITR register)
– Set the OCIS and/or ICIS and/or TOIS bit(s) of
the CR3 register to select the peripheral interrupt
source(s)
– Set the OCIE and/or ICIE and/or TOIE bit(s) of
the CR1 register to enable the peripheral to per-
form interrupt requests on the desiderate events
– In the EIPR register, reset the pending bit(s) of
the interrupt channels used by the peripheral in-
terrupts to avoid any spurious interrupt requests
being performed when the mask bit(s) is/are set
– Set the mask bit(s) of the interrupt channel(s)
used to enable the MCU to acknowledge the in-
terrupt requests of the peripheral.
Use of one external interrupt channel for all the
interrupts
To use the interrupt features, perform the following
sequence:
– Set the priority level of the interrupt channel used
(EIPRL register)
– Select the interrupt trigger edge as rising edge
(set the corresponding bit in the EITR register)
– Set the EFTIS bit of the CR3 register to select
the peripheral interrupt sources
– Set the OCIE and/or ICIE and/or TOIE bit(s) of
the CR1 register to enable the peripheral to per-
form interrupt requests on the wanted events
– In the EIPR register, reset the pending bit of the
interrupt channel used by the peripheral inter-
rupts to avoid any spurious interrupt requests be-
ing performed when the mask bits is set
– Set the mask bits of the interrupt channels used
to enable the MCU to acknowledge the interrupt
requests of the peripheral.
Caution: Care should be taken when using only
one of the input capture pins, as both capture in-
terrupts are enabled by the ICIE bit in the CR1 reg-
ister. If only ICAP1 is used (for example), an inter-
rupt can still be generated by the ICAP2 pin when
this pin toggles, even if it is configured as a stand-
ard output. If this case, the interrupt capture status
bits in the SR register should handled in polling
mode.
Caution:
1. It is mandatory to clear all EFT interrupt flags
simultaneously at least once before exiting an
EFT timer interrupt routine (the SR register
must = 00h at some point during the interrupt
routine), otherwise no interrupts can be issued
on that channel anymore.
Refer to the following assembly code for an
interrupt sequence example.
2. Since a loop statement is needed inside the IT
routine, the user must avoid situations where
an interrupt event period is narrower than the
duration of the interrupt treatment. Otherwise
nested interrupt mode must be used to serve
higher priority requests.
9
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST92R195C9 | 16-BIT, 24 MHz, MICROCONTROLLER, PQFP80 |
| STA2058 | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP64 |
| STCD1020RDG6E | PLL BASED CLOCK DRIVER, PDSO8 |
| STCD23300F35F | 2330 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA12 |
| STCD23100F35F | 2310 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA12 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST92T163R4T1 | 功能描述:8位微控制器 -MCU OTP EPROM 20K USB/I2 RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ST92T196/JAP | 制造商:STMicroelectronics 功能描述: |
| ST92T96N9B1/AIN | 制造商:STMicroelectronics 功能描述: |
| ST-930 | 制造商:UNBRANDED 功能描述:MULTIMETER DIGITAL BARGRAPH |
| ST93003 | 功能描述:兩極晶體管 - BJT Hi Vltg FAST SWITCH PNP Pwr TRANSISTOR RoHS:否 制造商:STMicroelectronics 配置: 晶體管極性:PNP 集電極—基極電壓 VCBO: 集電極—發(fā)射極最大電壓 VCEO:- 40 V 發(fā)射極 - 基極電壓 VEBO:- 6 V 集電極—射極飽和電壓: 最大直流電集電極電流: 增益帶寬產(chǎn)品fT: 直流集電極/Base Gain hfe Min:100 A 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PowerFLAT 2 x 2 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。