參數(shù)資料
型號: ST72P63BH4T1
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, ROHS COMPLIANT, LQFP-48
文件頁數(shù): 105/145頁
文件大小: 2984K
代理商: ST72P63BH4T1
ST7263BDx ST7263BHx ST7263BKx ST7263BE
62/145
16-bit timer (Cont’d)
Output Compare 2 High Register (OC2HR)
Read/Write
Reset value: 1000 0000 (80h)
This is an 8-bit register that contains the high part
of the value to be compared to the CHR register.
Output Compare 2 Low Register (OC2LR)
Read/Write
Reset value: 0000 0000 (00h)
This is an 8-bit register that contains the low part of
the value to be compared to the CLR register.
Counter High Register (CHR)
Read Only
Reset value: 1111 1111 (FFh)
This is an 8-bit register that contains the high part
of the counter value.
Counter Low Register (CLR)
Read Only
Reset value: 1111 1100 (FCh)
This is an 8-bit register that contains the low part of
the counter value. A write to this register resets the
counter. An access to this register after accessing
the CSR register clears the TOF bit.
Alternate Counter High Register (ACHR)
Read Only
Reset value: 1111 1111 (FFh)
This is an 8-bit register that contains the high part
of the counter value.
Alternate Counter Low Register (ACLR)
Read Only
Reset value: 1111 1100 (FCh)
This is an 8-bit register that contains the low part of
the counter value. A write to this register resets the
counter. An access to this register after an access
to CSR register does not clear the TOF bit in the
CSR register.
Input Capture 2 High Register (IC2HR)
Read Only
Reset value: Undefined
This is an 8-bit read only register that contains the
high part of the counter value (transferred by the
Input Capture 2 event).
Input Capture 2 Low Register (IC2LR)
Read Only
Reset value: Undefined
This is an 8-bit read only register that contains the
low part of the counter value (transferred by the In-
put Capture 2 event).
70
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70
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