參數(shù)資料
型號： ST72141K2B3/XXX
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP32
封裝： 0.400 INCH, PLASTIC, SDIP-32
文件頁數(shù)： 103/133頁
文件大?。?/td> 2615K
代理商： ST72141K2B3/XXX
Obsolete
Product(s)
- Obsolete
Product(s)
ST72141K2
71/133
MOTOR CONTROLLER (Cont’d)
PHASE STATE REGISTER (MPHST)
Read/Write
Reset Value: 0000 0000 (00h)
Bits 7:6 = IS[1:0]*: Input Selection bits
These bits select the input to connect to compara-
tor as shown in the following table:
Table 34. Input Channel Selection
Bits 5:0 =OO[5:0]*: Channel On/Off bits
These bits are used to switch channels on/off at
the next C event if the DAC bit =0 or directly if
DAC=1
0: Channel Off, the relevant switch is OFF, no
PWM possible
1: Channel On the relevant switch is ON, PWM is
possible.
Table 35. OO[5:0] Bit Meaning
* Preload bits, new value taken into account at
next C event.
PARITY REGISTER (MPAR)
Read/Write
Reset Value: 0000 0000 (00h)
Bit 7 = ZVD: Z vs D edge polarity.
0: Zero-crossing and End of Demagnetisation
have opposite edges
1: Zero-crossing and End of Demagnetisation
have same edge
Bit 6 = REO: Read on Even or Odd channel bit
0: Read the BEMF signal during the off time on
even channels
1: Read on odd channels
Bits 5:0 = OE[5:0]: Output Parity Mode.
0: Output channel is Even
1: Output channel Odd
POLARITY REGISTER (MPOL)
Read/Write
Reset Value: 0000 0000 (00h)
Bits 7:6 = OT[1:0]: Off Time selection.
These bits are used to select the off time in sen-
sorless mode as shown in the following table.
Table 36. Off-Time bit Meaning
Bits 5:0 = OP[5:0]: Output channel polarity.
These bits are used together with the OO[5:0] bits
in the MPHST register to control the output chan-
nels.
0: Output channel is Active Low
1: Output channel is Active High.
Table 37. Output Channel State Control
70
IS1*
IS0*
OO5*
OO4*
OO3*
OO2*
OO1*
OO0*
IS1
IS0
Channel selected
00
MCIA
01
MCIB
10
MCIC
1
Not Used
OO[5:0]
Output Channel State
0
Inactive
1Active
70
ZVD
REO
OE5
OE4
OE3
OE2
OE1
OE0
70
OT1
OT0
OP5
OP4
OP3
OP2
OP1
OP0
OT1
OT0
Off-Time
Sensorless
Mode (SR=0)
Off-Time
Sensor Mode
(SR=1)
00
5
μs
1.25
μs
0
1
10
μs
1
0
15
μs
1
30
μs
OP[5:0] bit
OO[5:0] bit
MCO[5:0] pin
00
1 (Off)
0
1
0 (PWM possible)
10
0 (Off)
1
1 (PWM possible)
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