參數(shù)資料
型號(hào)： ST40RA200XH6E
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 200 MHz, RISC PROCESSOR, PBGA372
封裝： 27 X 27 MM, 2.33 MM HEIGHT, PLASTIC, BGA-372
文件頁(yè)數(shù)： 50/94頁(yè)
文件大?。?/td> 2144K
代理商： ST40RA200XH6E
54/92
ST40RA
6 Clock generation
6.6.3
CLOCKGENA.STBREQCR and CLOCKGENB.STBREQCR registers
6.6.4
CLOCKGENA.STBREQCR_SET and CLOCKGENB.STBREQCR_SET registers
6.6.5
CLOCKGENA.STBREQCR_CLR and CLOCKGENB.STBREQCR_CLR register
CLOCKGENA.STBREQCR
CLOCKGENB.STBREQCR
Control power down requests
0x0018
This register gives direct access to the power down request register. Low power requests are made in
the STBREQCR_SET register and cleared in the STBREQCR_CLR register.
[0:7]
REQ[0:7]
Power down requests for module [n]
Controls the power down state for module [n]
Bit [n]: 0 Request module [n] to operate normally
Bit [n]: 1 Request module [n] to power down
Reset state: 0
RW
[8:31]
Reserved
0: No action
1: Undefined
Reset state: Undefined
CLOCKGENA.STBREQCR_SET
CLOCKGENB.STBREQCR_SET
Set power down requests
0x0020
This register sets a low power request.
[0:7]
SET[0:7]
Set power down request for module [n]
Sets the power down request state for module [n]
Bit [n]: 0 No action
Bit [n]: 1 Set power down request
Reset state: 0
WO
[8:31]
Reserved
0: No action
1: Undefined
Reset state: Undefined
CLOCKGENA.STBREQCR_CLR
CLOCKGENB.STBREQCR_CLR
Clear power down requests
0x0028
This register clears a low power request and recommences the clock supply to a module.
[0:7]
CLR[0:7]
Clear power down request for module [n]
Clears the power down request state for module [n]
Bit [n]: 0 No action
Bit [n]: 1 Clear power down request
Reset state: 0
WO
[8:31]
Reserved
0: No action
1: Undefined
Reset state: Undefined
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