參數(shù)資料
型號: ST40RA200XH6E
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 200 MHz, RISC PROCESSOR, PBGA372
封裝: 27 X 27 MM, 2.33 MM HEIGHT, PLASTIC, BGA-372
文件頁數(shù): 25/94頁
文件大?。?/td> 2144K
代理商: ST40RA200XH6E
5 System configuration
ST40RA
31/92
5.5
EMI DACK mapping
For full details of the EMI bank address and bank type mappings refer to ST40 System Architecture
Manual Volume 2: Bus Interfaces.
Two DACK strobes are supported in this implementation and are mapped as follows:
DACK[0]: asserted when a transfer from GPDMA channel[1] occurs to an EMI bank configured
as a MPX device,
DACK[1]: asserted when a transfer from GPDMA channel[2] occurs to an EMI bank configured
as a MPX device.
5.6
EMI address pin mapping
The data width of a connected device is 8, 16 or 32 bits wide. The 16-bit bank must use EDQM3 as
address 1, the LSB address for the device and the 8-bit bank must use EDQM3 as address 1 and
EDQM2 as address 0.
See the ST40 System Architecture Manual, Volume 2: Bus Interfaces for details of setting the
device type and port size using the EMI configuration registers.
Table 10: Mapping the internal address lines of a connected device
Device type
Port size
Device address 25 to 2
Device address 1
Device address 0
SDRAM
Peripheral
SFlash
32-bit
EADDR[25:2]
-
16-bit
EADDR[24:2]
EDQM3
-
8-bit
EADDR[23:2]
EDQM3
EDQM2
MPX
-
EADDR[25:2]
-
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