參數(shù)資料
型號: ST40RA200XH6E
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 200 MHz, RISC PROCESSOR, PBGA372
封裝: 27 X 27 MM, 2.33 MM HEIGHT, PLASTIC, BGA-372
文件頁數(shù): 28/94頁
文件大小: 2144K
代理商: ST40RA200XH6E
34/92
ST40RA
5 System configuration
5.8
Memory bridge control
The architecture of the SuperHyway interconnect is shown in Figure 4. Initiators are shown on the
left, and targets are shown on the right of the interconnect. The bit width of the initiator and target
ports are shown in the diagram.
The ST40RA architecture requires seven memory bridges on clock change boundaries.
Figure 4: ST40RA interconnect architecture
Table 12: Memory bridges
Memory bridge number
SuperHyway type
Subsystem
1
T3
EMI target
2
T3
EMPI initiator
3
T1
EMI_SS target
4
T2
Reserved
5
T2
Reserved
6T3
PCI_ST_I
7T3
PCI_ST_T
SuperHyway
Interconnect
SH core
EMPI
PCI_ST_I
LMI
EMI
PCI_ST_T
Memory
bridge
Memory
bridge
Memory
bridge
Memory
bridge
P
I
PER
SH_PER
32
GPDMA
32
64
32
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