REV. 4.2.2 2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain. RIA# 43 " />
參數(shù)資料
型號: ST16C2552CJ44-F
廠商: Exar Corporation
文件頁數(shù): 30/34頁
文件大小: 0K
描述: IC UART FIFO 16B DUAL 44PLCC
標準包裝: 27
特點: *
通道數(shù): 2,DUART
FIFO's: 16 字節(jié)
規(guī)程: RS232,RS485
電源電壓: 3.3 V ~ 5 V
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線)
供應商設備封裝: 44-PLCC(16.59x16.59)
包裝: 管件
其它名稱: 1016-1257-5
ST16C2552
5
REV. 4.2.2
2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
RIA#
43
I
UART channel A Ring-Indicator (active low) or general purpose input. This input
should be connected to VCC when not used. This input has no effect on the UART.
TXB
26
O
UART channel B Transmit Data. If it is not used, leave it unconnected.
RXB
25
I
UART channel B Receive Data. Normal receive data input must idle at logic 1 condi-
tion. If it is not used, tie it to VCC or pull it high via a 100k ohm resistor.
RTSB#
23
O
UART channel B Request-to-Send (active low) or general purpose output. If it is not
used, leave it unconnected.
CTSB#
28
I
UART channel B Clear-to-Send (active low) or general purpose input. This input
should be connected to VCC when not used. This input has no effect on the UART.
DTRB#
27
O
UART channel B Data-Terminal-Ready (active low) or general purpose output. If it is
not used, leave it unconnected.
DSRB#
29
I
UART channel B Data-Set-Ready (active low) or general purpose input. This input
should be connected to VCC when not used. This input has no effect on the UART.
CDB#
30
I
UART channel B Carrier-Detect (active low) or general purpose input. This input
should be connected to VCC when not used. This input has no effect on the UART.
RIB#
31
I
UART channel B Ring-Indicator (active low) or general purpose input. This input
should be connected to VCC when not used. This input has no effect on the UART.
ANCILLARY SIGNALS
XTAL1
11
I
Crystal or external clock input.
XTAL2
13
O
Crystal or buffered clock output.
RESET
21
I
Reset (active high) - A longer than 40 ns logic 1 pulse on this pin will reset the internal
registers and all outputs. The UART transmitter output will be held at logic 1, the
receiver input will be ignored and outputs are reset during reset period (see External
Reset Conditions).
VCC
44, 33
Pwr
3.3V to 5V power supply. All inputs are 5V tolerant for devices with top marking of
"A2 YYWW" and newer.
GND
22, 12
Pwr
Power supply common, ground.
Pin Description
NAME
44-PLCC
PIN #
TYPE
DESCRIPTION
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